METHOD OF FABRICATING THIN FILM TRANSISTOR HAVING MULTILAYER STRUCTURE AND ACTIVE MATRIX DISPLAY DEVICE INCLUDING THE THIN FILM TRANSISTOR

• US 20080135837A1
• Filed: 10/11/2007
• Published: 06/12/2008
• Est. Priority Date: 12/07/2006
• Status: Active Grant

• Current Assignee: Electronics and Telecommunications Research Institute
• Original Assignee: Electronics and Telecommunications Research Institute
• Inventors: CHUNG, Choong Heui, MOON, Jae Hyun, KIM, Yong Hae, SONG, Yoon Ho
• Granted Patent: US 7,642,143 B2
• Time in Patent Office: Days
• US Class Current: 257/40
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence

Abstract

Provided are a method of fabricating a multilayered thin film transistor using a plastic substrate and an active matrix display device including the thin film transistor fabricated by the method. The method includes: preparing a substrate formed of plastic; forming a buffer insulating layer on the plastic substrate; forming a silicon layer on the buffer insulating layer; patterning the silicon layer to form an active layer; forming a gate insulating layer on the active layer; stacking a plurality of gate metal layers on the gate insulating layer; patterning the plurality of gate metal layers; and etching a corner region of the lowest gate metal layer formed on the gate insulating layer of the patterned gate metal layers. Accordingly, a gate metal is formed which includes a multilayered gate metal layer and has an etched corner region, thereby reducing an electric field of the corner to reduce a leakage current of the TFT.

Claims

1. A method of fabricating a thin film transistor, comprising:

preparing a substrate formed of plastic;

forming a buffer insulating layer on the plastic substrate;

forming a silicon layer on the buffer insulating layer;

patterning the silicon layer to form an active layer;

forming a gate insulating layer on the active layer;

stacking a plurality of gate metal layers on the gate insulating layer;

patterning the plurality of gate metal layers; and

etching a corner region of the lowest gate metal layer formed on the gate insulating layer of the patterned gate metal layers.

2. The method according to claim 1, further comprising:

etching a corner region of the highest gate metal layer when the number of the gate metal layers is more than three.

3. The method according to claim 1, wherein the highest gate metal layer of the plurality of gate metal layers is formed of a material having a high reflectivity.

4. The method according to claim 3, wherein the material having the high reflectivity comprises one of Al, Ag, an Al alloy and an Ag alloy.

5. The method according to claim 1, wherein the gate metal layer in direct contact with the lowest gate metal layer of the plurality of gate metal layers is formed of a different material from the lowest gate metal layer.

6. An active matrix display device comprising a thin film transistor fabricated by the method according to claim 1, and a capacitor and an organic light emitting diode which are electrically connected to the thin film transistor.