Signal isolator using micro-transformers

• US 20080136442A1
• Filed: 01/22/2008
• Published: 06/12/2008
• Est. Priority Date: 07/06/2006
• Status: Active Grant

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Chen, Baoxing
• Granted Patent: US 7,719,305 B2
• Time in Patent Office: Days
• US Class Current: 326/21
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H03K 19/003 Modifications for increasing the reliability for protection
• CPC Class Codes: H03K 19/16 using saturable magnetic devices

Abstract

A logic signal isolator including a micro-transformer with a primary winding and a secondary winding. A transmitter circuit drives the primary winding in response to a received input logic signal such that, in response to a first type of edge in the logic signal, at least a first amplitude signal is supplied to the primary winding and, in response to a second type of edge in the logic signal, a second different amplitude signal is supplied to the primary winding. A receiver circuit receives corresponding first amplitude and second amplitude signals from the secondary winding and reconstructs the received logic input signal from the received signals.

Claims

1. A logic signal isolator comprising:

a micro-transformer with a primary winding and a secondary winding;

a transmitter circuit which drives the primary winding in response to a received input logic signal such that, in response to a first type of edge in the logic signal, at least a first amplitude signal is supplied to the primary winding and, in response to a second type of edge in the logic signal, a second different amplitude signal is supplied to the primary winding;

a receiver circuit receiving corresponding first amplitude and second amplitude signals from the secondary winding and reconstructing the received logic input signal from the received signals.

2. The logic signal isolator of claim 1 in which the transmitter circuit includes a first differentiator for generating a first pulse in response to the first type of edge and a second differentiator for generating a second pulse in response to the second type of edge.

3. The logic signal isolator of claim 2 in which the transmitter includes a gate connected to both differentiators and responsive to a first voltage for generating the first amplitude signal and responsive to a second voltage for generating the second amplitude signal.

4. The logic signal isolator of claim 1 in which the transmitter circuit further includes a refresh circuit for periodically sending a refresh signal across the micro-transformer.

5. The logic signal isolator of claim 1 in which the receiver circuit includes a first threshold detector connected to the secondary winding generating pulses in response to both the first amplitude and second amplitude signals and a second threshold detector connected to the secondary winding generating a pulse in response to the first amplitude signal.

6. The logic signal isolator of claim 5 in which the receiver circuit further includes a gate responsive to both threshold detectors.

7. The logic signal isolator of claim 6 in which the gate is a NOR gate and produces a high signal only when no pulses are present.

8. The logic signal isolator of claim 1 in which the receiver circuit further includes a watchdog circuit.