METHOD OF FABRICATING BIPOLAR TRANSISTORS AND HIGH-SPEED LVDS DRIVER WITH THE BIPOLAR TRANSISTORS

• US 20080136464A1
• Filed: 10/31/2007
• Published: 06/12/2008
• Est. Priority Date: 12/06/2006
• Status: Abandoned Application

• Current Assignee: Electronics and Telecommunications Research Institute
• Original Assignee: Electronics and Telecommunications Research Institute
• Inventors: Kim, Jong Dae, Kwon, Chong Ki, KIM, Kwi Dong
• Application Number:
  US11/933,025
• Publication Number:
  US 20080136464A1
• Time in Patent Office: Days
• US Class Current: 327/108
• CPC Class Codes: H01L 21/8249 Bipolar and MOS technology
• CPC Class Codes: H01L 27/0623 in combination with bipolar transistors
• CPC Class Codes: H01L 29/41708 Emitter or collector electrodes for bipolar transistors
• CPC Class Codes: H01L 29/7322 having emitter-base and base-collector junctions leaving at the same surface of the body, e.g. planar transistor
• CPC Class Codes: H03F 2203/45008 the addition of two signals being made by a resistor addition circuit for producing the common mode signal
• CPC Class Codes: H03F 2203/45082 the common mode signal being taken or deducted from the one or more outputs of the differential amplifier
• CPC Class Codes: H03F 2203/45418 the CMCL comprising a resistor addition circuit
• CPC Class Codes: H03F 2203/45424 the CMCL comprising a comparator circuit
• CPC Class Codes: H03F 3/45085 Long tailed pairs H03F3/45112, H03F3/45139 take precedence
• CPC Class Codes: H03F 3/45179 using MOSFET transistors as the active amplifying circuit H03F3/45278 takes precedence
• CPC Class Codes: H03F 3/45502 Controlling the common emitter circuit of the differential amplifier
• CPC Class Codes: H03K 19/01 Modifications for accelerating switching
• CPC Class Codes: H03K 5/003 Changing the DC level reinsertion of dc component of a television signal H04N5/16
• CPC Class Codes: H04L 25/0276 Arrangements for coupling common mode signals
• CPC Class Codes: H04L 25/0282 Provision for current-mode coupling

Abstract

Provided is a differential signal driver capable of operating at a high speed at a low voltage of 1.8V. The differential signal driver includes: a differential-signal driving circuit for switching input differential signals and outputting a common mode voltage through first and second output nodes; and a common-mode feedback circuit for providing a predetermined current to the differential-signal driving circuit or receiving a predetermined current from the differential-signal driving circuit in response to the common mode voltage. The differential-signal driving circuit includes a common-mode voltage output circuit for connecting the first output node to the second output node and generating the common mode voltage of the differential-signal driving circuit. The differential input signals are received through two bipolar transistors.

Claims

1. A method of fabricating a bipolar transistor and a field effect transistor on a substrate, the method comprising the steps of:

forming a first-conductive first well region of the bipolar transistor deeper than a first-conductive third well region and a second-conductive fourth well region of the field effect transistor; and

forming a second-conductive second well region, which is formed in the first well region, shallower than the third and fourth well regions,

wherein the bipolar transistor has a different potential than the field effect transistor.

2. A high-speed low-voltage differential signal driver comprising:

a differential-signal driving circuit for switching input differential signals and outputting a common mode voltage through first and second output nodes; and

a common-mode feedback circuit for providing a predetermined current to the differential-signal driving circuit or receiving a predetermined current from the differential-signal driving circuit in response to the common mode voltage,

wherein the differential-signal driving circuit comprises a common-mode voltage output circuit for connecting the first output node to the second output node and generating the common mode voltage of the differential-signal driving circuit, and

wherein the differential signals are received through two bipolar transistors.

3. The high-speed low-voltage differential signal driver of claim 2, wherein the common-mode voltage output circuit comprises first and second resistors between the first and second output nodes, and outputs the common mode voltage through an intermediate node connecting the first resistor to the second resistor.

4. The high-speed low-voltage differential signal driver of claim 2, wherein the differential-signal driving circuit comprises:

a first bipolar transistor having a first end connected to the first output node and a second end connected to a current node, and receiving the first differential input signal through a base;

a second bipolar transistor having a first end connected to the second output node and a second end connected to the current node, and receiving the second differential input signal through a base; and

a third NMOS transistor having a first end connected to the current node, a gate coupled to the common-mode feedback circuit, and a second end connected to a ground.

5. The high-speed low-voltage differential signal driver of claim 4, wherein the common-mode feedback circuit comprises:

a fifth PMOS transistor having a first end receiving a current, a gate receiving a reference voltage, and a second end connected to the current node; and

a sixth PMOS transistor having a first end receiving a current, a gate coupled to the intermediate node, and a second node connected to a current mirror,

wherein the current mirror comprises;

a first NMOS transistor having a first end connected to the current node, a gate coupled to the second end of the sixth PMOS transistor, and a second end connected to the ground; and

a second NMOS transistor having a first end and a gate which are coupled to the second end of the sixth PMOS transistor, and a second end connected to the ground.

6. The high-speed low-voltage differential signal driver of claim 4, wherein the common-mode feedback circuit supplies a predetermined current to the current node of the differential-signal driving circuit when the common mode voltage is lower than the reference voltage.

7. The high-speed low-voltage differential signal driver of claim 4, wherein the common-mode feedback circuit is supplied with a predetermined current from the current node of the differential-signal driving circuit when the common mode voltage is higher than the reference voltage.

8. The high-speed low-voltage differential signal driver of claim 4, wherein the common-mode feedback circuit comprises a Miller-effect compensation circuit including a third resistor and a capacitor that connect the current node to the gate of the third NMOS transistor.

9. The high-speed low-voltage differential signal driver of claim 2, wherein the bipolar transistor and the field effect transistor are formed on the same substrate, but have different potentials from each other, and

wherein the first-conductive first well region of the bipolar transistor is formed deeper than the first-conductive third well region and the second-conductive fourth well region of the field effect transistor, and the second-conductive second well region formed in the first well region is formed shallower than the third and fourth well regions.