ELECTRONIC DEVICE AND RF MODULE

• US 20080136559A1
• Filed: 12/06/2007
• Published: 06/12/2008
• Est. Priority Date: 12/08/2006
• Status: Abandoned Application

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: TAKAHASHI, Wataru, Tsuchida, Shigeru, Okabe, Hiroshi
• Application Number:
  US11/951,600
• Publication Number:
  US 20080136559A1
• Time in Patent Office: Days
• US Class Current: 333/167
• CPC Class Codes: H01F 17/0006 Printed inductances printed coils for dynamo-electric machines H02K3/26; printed circuits H05K
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H03H 2001/0085 Multilayer, e.g. LTCC, HTCC, green sheets inside PCB filters H05K
• CPC Class Codes: H03H 7/0115 comprising only inductors and capacitors H03H7/075, H03H7/09, H03H7/12, H03H7/13 take precedence
• CPC Class Codes: H03H 7/1758 Series LC in shunt or branch path H03H7/1791 takes precedence
• CPC Class Codes: H03H 7/1766 Parallel LC in series path H03H7/1783 takes precedence
• CPC Class Codes: H03H 7/383 comprising distributed impedance elements together with lumped impedance elements
• CPC Class Codes: H03H 7/465 having variable circuit topology, e.g. including switches
• CPC Class Codes: H05K 1/0237 High frequency adaptations H05K1/0216 takes precedence
• CPC Class Codes: H05K 1/116 Lands, clearance holes or other lay-out details concerning the surrounding of a via
• CPC Class Codes: H05K 1/16 incorporating printed electric components, e.g. printed resistor, capacitor, inductor
• CPC Class Codes: H05K 1/165 incorporating printed inductors
• CPC Class Codes: H05K 2201/09636 Details of adjacent, not connected vias
• CPC Class Codes: H05K 2201/09672 Superposed layout, i.e. in different planes parallel traces in one plane H05K2201/09236
• CPC Class Codes: H05K 3/429 Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers

Abstract

A parallel resonant circuit is realized by stacking first to fourth wiring patterns each having at least an inductance element. One of the adjacent first and second wiring patterns is set to a signal input node and the other thereof is set to a signal output node. Then, the signal input node is connected to the signal output node via inductance elements of the first wiring pattern, third wiring pattern, fourth wiring pattern and second wiring pattern in order. By adjacently forming wiring layers of the signal input and output nodes, a capacitance value between the input and output nodes is increased compared to that when they are separated. Also, by increasing the line width of the first and second wiring patterns, the capacitance value can be further increased. Therefore, it is possible to achieve a large capacitance value in a small area and downsizing of the electronic device.

Claims

1. An electronic device formed in a multilayer wiring substrate including a first wiring layer, a second wiring layer disposed below the first wiring layer and a third wiring layer disposed below the second wiring layer, the electronic device comprising:

a first wiring pattern formed in the first wiring layer so as to include an approximately loop-shaped line with a predetermined line width or more, and having a first node for inputting/outputting a signal at one end thereof;

a second wiring pattern formed in the second wiring layer so as to include an approximately loop-shaped line with a predetermined line width or more, and having a second node for inputting/outputting a signal at one end thereof;

a third wiring pattern formed in the third wiring layer so as to include an approximately loop-shaped line with a line width narrower than the predetermined width or formed so as to include a plurality of approximately loop-shaped lines with a line width narrower than the predetermined width over the third wiring layer and its underlying wiring layer;

a first via hole conductor electrically connecting other end of the first wiring pattern and one end of the third wiring pattern; and

a second via hole conductor electrically connecting other end of the second wiring pattern and other end of the third wiring pattern,

wherein the first wiring pattern, the second wiring pattern and the third wiring pattern are formed so as to overlap each other, and an overlapping area of the first wiring pattern and the second wiring pattern is larger than an overlapping area of the second wiring pattern and the third wiring pattern.

2. The electronic device according to claim 1,

wherein the one end of the first wiring pattern, the one end of the second wiring pattern and the other end of the third wiring pattern are disposed in an outer peripheral portion of the respective wiring patterns, and

the other end of the first wiring pattern and the one end of the third wiring pattern are disposed inside a loop of the respective wiring patterns.

3. The electronic device according to claim 1,

wherein the multilayer wiring substrate includes a lower wiring layer below the third wiring pattern or an upper wiring layer above the first wiring layer, and

the lower wiring layer or the upper wiring layer serves as a ground electrode connected to a ground potential.

4. The electronic device according to claim 1,

wherein the multilayer wiring substrate further includes a fourth wiring layer disposed below the third wiring layer,

the third wiring pattern includes a first approximately loop-shaped line formed of the third wiring layer and a second approximately loop-shaped line formed of the fourth wiring layer,

one end of the first line is the one end of the third wiring pattern,

other end of the second line is the other end of the third wiring pattern, and

other end of the first line is electrically connected to one end of the second line via a third via hole conductor.

5. The electronic device according to claim 1,

wherein the electronic device constitutes a resonant circuit, includes a capacitive element constituted of the first wiring pattern and the second wiring pattern, and includes an inductor constituted of the third wiring pattern.

6. An RF module, comprising:

an electronic device formed in a multilayer wiring substrate including a first wiring layer, a second wiring layer disposed below the first wiring layer and a third wiring layer disposed below the second wiring layer, the electronic device comprising

a first wiring pattern formed in the first wiring layer so as to include an approximately loop-shaped line with a predetermined line width or more, and having a first node for inputting/outputting a signal at one end thereof,

a second wiring pattern formed in the second wiring layer so as to include an approximately loop-shaped line with a predetermined line width or more, and having a second node for inputting/outputting a signal at one end thereof,

a third wiring pattern formed in the third wiring layer so as to include an approximately loop-shaped line with a line width narrower than the predetermined width or formed so as to include a plurality of approximately loop-shaped lines with a line width narrower than the predetermined width over the third wiring layer and its underlying wiring layer,

a first via hole conductor electrically connecting other end of the first wiring pattern and one end of the third wiring pattern, and

a second via hole conductor electrically connecting other end of the second wiring pattern and other end of the third wiring pattern,

in which the first wiring pattern, the second wiring pattern and the third wiring pattern are formed so as to overlap each other, and an overlapping area of the first wiring pattern and the second wiring pattern is larger than an overlapping area of the second wiring pattern and the third wiring pattern;

a first semiconductor chip including a power amplifier circuit for amplifying an inputted signal to output the amplified signal, and mounted on the multilayer wiring substrate; and

a second semiconductor chip including an antenna switch circuit for receiving an output from the power amplifier circuit, mounted on the multilayer wiring substrate, and connected to any one of the first node and the second node of the electronic device.

7. An electronic device formed in a multilayer wiring substrate including a first wiring layer, a second wiring layer disposed below the first wiring layer, a third wiring layer disposed below the second wiring layer and a fourth wiring layer disposed below the third wiring layer, the electronic device comprising:

a first wiring pattern formed in the first wiring layer so as to include an approximately loop-shaped line, and having a first node for inputting/outputting a signal at one end thereof;

a second wiring pattern formed in the second wiring layer so as to include an approximately loop-shaped line, and having a second node for inputting/outputting a signal at one end thereof;

a third wiring pattern formed into a plane shape in the third wiring layer; and

a fourth wiring pattern formed into a plane shape in the fourth wiring layer,

wherein other end of the first wiring pattern and other end of the second wiring pattern are electrically connected to each other via a first via hole conductor,

the third wiring pattern and the fourth wiring pattern are disposed opposing to each other,

one pattern of the third wiring pattern and the fourth wiring pattern is electrically connected to the first node via a second via hole conductor,

other pattern of the third wiring pattern and the fourth wiring pattern is electrically connected to the second node via a third via hole conductor, and

the first wiring pattern, the second wiring pattern, the third wiring pattern and the fourth wiring pattern are formed overlapping each other, and an overlapping area of the third wiring pattern and the fourth wiring pattern is larger than an overlapping area of the second wiring pattern and the third wiring pattern.

8. The electronic device according to claim 7,

wherein the third wiring pattern and the fourth wiring pattern are disposed inside an outer periphery of the first wiring pattern or the second wiring pattern.

9. The electronic device according to claim 7,

wherein the multilayer wiring substrate has a fifth wiring layer below the fourth wiring layer or a sixth wiring layer above the first wiring layer, and

the fifth wiring layer or the sixth wiring layer serves as a ground electrode connected to a ground potential.

10. The electronic device according to claim 7,

wherein the third wiring pattern is electrically connected to the first node via the second via hole conductor, and

the fourth wiring pattern is electrically connected to the second node via the third via hole conductor.

11. The electronic device according to claim 10,

wherein the one end and the other end of the first wiring pattern, the one end and the other end of the second wiring pattern, the first via hole conductor and the third via hole conductor are disposed outside an outer periphery of the third wiring pattern.

12. The electronic device according to claim 7,

wherein the electronic device constitutes a resonant circuit, includes an inductor constituted of the first wiring pattern and the second wiring pattern, and includes a capacitive element constituted of the third wiring pattern and the fourth wiring pattern.

13. An RF module, comprising:

an electronic device formed in a multilayer wiring substrate including a first wiring layer, a second wiring layer disposed below the first wiring layer, a third wiring layer disposed below the second wiring layer and a fourth wiring layer disposed below the third wiring layer, the electronic device comprising

a first wiring pattern formed in the first wiring layer so as to include an approximately loop-shaped line, and having a first node for inputting/outputting a signal at one end thereof,

a second wiring pattern formed in the second wiring layer so as to include an approximately loop-shaped line, and having a second node for inputting/outputting a signal at one end thereof,

a third wiring pattern formed into a plane shape in the third wiring layer, and

a fourth wiring pattern formed into a plane shape in the fourth wiring layer,

in which other end of the first wiring pattern and other end of the second wiring pattern are electrically connected to each other via a first via hole conductor,

the third wiring pattern and the fourth wiring pattern are disposed opposing to each other,

one pattern of the third wiring pattern and the fourth wiring pattern is electrically connected to the first node via a second via hole conductor,

other pattern of the third wiring pattern and the fourth wiring pattern is electrically connected to the second node via a third via hole conductor, and

the first wiring pattern, the second wiring pattern, the third wiring pattern and the fourth wiring pattern are formed overlapping each other, and an overlapping area of the third wiring pattern and the fourth wiring pattern is larger than an overlapping area of the second wiring pattern and the third wiring pattern;

a first semiconductor chip including a power amplifier circuit for amplifying an inputted signal to output the amplified signal, and mounted on the multilayer wiring substrate; and

a second semiconductor chip including an antenna switch circuit for receiving an output from the power amplifier circuit, mounted on the multilayer wiring substrate, and connected to any one of the first node and the second node of the electronic device.

14. An RF module formed in a multilayer wiring substrate including a first wiring layer, a second wiring layer disposed below the first wiring layer, a third wiring layer disposed below the second wiring layer and a fourth wiring layer disposed below the third wiring layer, the RF module comprising:

a first resonant circuit including a first wiring pattern formed in the first wiring layer and having a first node for inputting or outputting a signal at one end thereof, a second wiring pattern formed in the second wiring layer and having a second node for outputting or inputting a signal at one end thereof, and a third wiring pattern formed in the third wiring layer or over the third wiring layer and its underlying wiring layer;

a second resonant circuit including a fourth wiring pattern formed in the first wiring layer and having a third node for inputting or outputting a signal at one end thereof, a fifth wiring pattern formed in the second wiring layer and having a fourth node for outputting or inputting a signal at one end thereof, a sixth wiring pattern formed in the third wiring layer and a seventh wiring pattern formed in the fourth wiring layer;

a first semiconductor chip including a power amplifier circuit for amplifying an inputted signal to output the amplified signal, and mounted on the multilayer wiring substrate; and

a second semiconductor chip including an antenna switch circuit for receiving an output from the power amplifier circuit, mounted on the multilayer wiring substrate, and connected to either of the first node or the second node of the first resonant circuit and to either of the third node or the fourth node of the second resonant circuit,

wherein a capacitance value of a capacitor formed from the first wiring pattern and the second wiring pattern of the first resonant circuit is larger than a capacitance value of a capacitor formed from the sixth wiring pattern and the seventh wiring pattern of the second resonant circuit, and

a signal of a first frequency is inputted to the first resonant circuit, and a signal of a second frequency higher than the first frequency is inputted to the second resonant circuit.

15. The RF module according to claim 14,

wherein the first and second wiring patterns and the sixth and seventh wiring patterns are formed so as to overlap each other, and

an overlapping area of the first wiring pattern and the second wiring pattern of the first resonant circuit is larger than an overlapping area of the sixth wiring pattern and the seventh wiring pattern of the second resonant circuit.

16. An RF module formed in a multilayer wiring substrate including a first wiring layer, a second wiring layer disposed below the first wiring layer, a third wiring layer disposed below the second wiring layer and a fourth wiring layer disposed below the third wiring layer, the RF module comprising:

a first resonant circuit comprising a first wiring pattern formed in the first wiring layer and having a first node for inputting or outputting a signal at one end thereof, a second wiring pattern formed in the second wiring layer and having a second node for outputting or inputting a signal at one end thereof, and a third wiring pattern formed in the third wiring layer or over the third wiring layer and its underlying wiring layer,

in which other end of the first wiring pattern is electrically connected to one end of the third wiring pattern, and

other end of the third wiring pattern is electrically connected to other end of the second wiring pattern;

a second resonant circuit comprising a fourth wiring pattern formed in the first wiring layer and having a third node for inputting or outputting a signal at one end thereof, a fifth wiring pattern formed in the second wiring layer and having a fourth node for outputting or inputting a signal at one end thereof, a sixth wiring pattern formed to have a plane shape in the third wiring layer and a seventh wiring pattern formed to have a plane shape in the fourth wiring layer,

in which other end of the fourth wiring pattern is electrically connected to other end of the fifth wiring pattern, the sixth wiring pattern is electrically connected to the third node at the one end of the fourth wiring pattern, and

the seventh wiring pattern is electrically connected to the fourth node at the one end of the fifth wiring pattern;

a first semiconductor chip including a power amplifier circuit for amplifying an inputted signal to output the amplified signal, and mounted on the multilayer wiring substrate; and

a second semiconductor chip including an antenna switch circuit for receiving an output from the power amplifier circuit, mounted on the multilayer wiring substrate, and connected to either of the first node or the second node of the first resonant circuit and connected to either of the third node or the fourth node of the second resonant circuit,

wherein a capacitance value of a capacitor formed from the first wiring pattern and the second wiring pattern of the first resonant circuit is larger than a capacitance value of a capacitor formed from the sixth wiring pattern and the seventh wiring pattern of the second resonant circuit, and

a signal of a first frequency is inputted to the first resonant circuit, and a signal of a second frequency higher than the first frequency is inputted to the second resonant circuit.

17. The RF module according to claim 16,

wherein the first and second wiring patterns and the sixth and seventh wiring patterns are formed so as to overlap each other, and

an overlapping area of the first wiring pattern and the second wiring pattern of the first resonant circuit is larger than an overlapping area of the sixth wiring pattern and the seventh wiring pattern of the second resonant circuit.

18. An electronic device, comprising:

a resonant circuit formed in a multilayer wiring substrate including a first wiring layer,

wherein a wiring layer includes a wiring pattern formed so as to include an approximately loop-shaped line, and

the wiring pattern is formed in a meandering shape.

19. An RF module, comprising:

an RF power amplifier;

an output matching circuit;

a directional coupler; and

a harmonic elimination filter,

wherein an output amplification signal from the RF power amplifier is supplied to an input terminal of the output matching circuit,

an RF signal from an output terminal of the output matching circuit is supplied to an input terminal of the harmonic elimination filter via a main line of the directional coupler,

a detection signal from a sub line of the directional coupler is supplied to a signal input terminal of a gain control unit of the RF power amplifier, and

an RF signal from an output terminal of the harmonic elimination filter can be transmitted to an antenna.

20. The RF module according to claim 19, further comprising:

an antenna switch, to one terminal of which the RF signal from the output terminal of the harmonic elimination filter is supplied, and from other terminal of which an RF signal can be transmitted to the antenna.

21. The RF module according to claim 20,

wherein the RF signal from the output terminal of the harmonic elimination filter is supplied to the one terminal of the antenna switch via a DC cut capacitor.

22. The RF module according to claim 19,

wherein the RF power amplifier includes a multistage amplifier and a bias circuit controlled by the gain control unit to control a gain of the multistage amplifier.

23. The RF module according to claim 19,

wherein the output matching circuit reduces a signal reflection due to a difference between an output impedance for generating the output amplification signal of the RF power amplifier and an impedance of the antenna.

24. The RF module according to claim 22,

wherein the multistage amplifier, the bias circuit and the gain control unit are formed in a semiconductor integrated circuit chip.

25. The RF module according to claim 19,

wherein the directional coupler is a microcoupler having a capacitive element connected between a main line and a sub line thereof.

26. An RF module, comprising:

a first RF power amplifier;

a first output matching circuit;

a first directional coupler;

a first harmonic elimination filter;

a second RF power amplifier;

a second output matching circuit;

a second directional coupler; and

a second harmonic elimination filter,

wherein the first RF power amplifier is configured to amplify a first frequency band RF signal, and the second RF power amplifier is configured to amplify a second frequency band RF signal with a frequency higher than that of the first frequency band RF signal,

a first output amplification signal from the first RF power amplifier is supplied to an input terminal of the first output matching circuit, a first RF signal from an output terminal of the first output matching circuit is supplied to an input terminal of the first harmonic elimination filter via a main line of the first directional coupler, a first detection signal from a sub line of the first directional coupler is supplied to a first signal input terminal of a first gain control unit for the first RF power amplifier, and a first RF signal from an output terminal of the first harmonic elimination filter can be transmitted to an antenna, and

a second output amplification signal of the second RF power amplifier is supplied to an input terminal of the second output matching circuit, a second RF signal from an output terminal of the second output matching circuit is supplied to an input terminal of the second harmonic elimination filter via a main line of the second directional coupler, a second detection signal from a sub line of the second directional coupler is supplied to a second signal input terminal of a second gain control unit for the second RF power amplifier, and a second RF signal from an output terminal of the second harmonic elimination filter can be transmitted to the antenna.

27. The RF module according to claim 26,

wherein the first RF signal from the output terminal of the first harmonic elimination filter is supplied to a first input terminal of an antenna switch, the second RF signal from the output terminal of the second harmonic elimination filter is supplied to a second input terminal of the antenna switch, and an RF signal from an output terminal of the antenna switch can be transmitted to the antenna.

28. The RF module according to claim 27,

wherein the first RF signal from the output terminal of the first harmonic elimination filter is supplied to the first input terminal of the antenna switch via a first DC cut capacitor, and the second RF signal from the output terminal of the second harmonic elimination filter is supplied to the second input terminal of the antenna switch via a second DC cut capacitor.

29. The RF module according to claim 26,

wherein the first RF power amplifier, the second RF power amplifier, the first gain control unit and the second gain control unit are formed in a semiconductor integrated circuit chip,

the semiconductor integrated circuit chip has a substantially quadrangular shape,

the chip has a first side and a second side which are opposed and substantially parallel to each other, a third side which is connected to the first side and the second side and disposed substantially perpendicular to the first side and the second side, and a fourth side which is opposed and substantially parallel to the third side,

the first output amplification signal from the first RF power amplifier is led out from the first side of the chip, and the second output amplification signal from the second RF power amplifier is led out from the second side of the chip, and

the first detection signal from the sub line of the first directional coupler is led into the first signal input terminal of the first gain control unit for the first RF power amplifier from the third side of the chip, and the second detection signal from the sub line of the second directional coupler is led into the second signal input terminal of the second gain control unit for the second RF power amplifier from the third side of the chip.

30. The RF module according to claim 29,

wherein a lead-in point of the second detection signal on the third side is disposed between a lead-out point of the first output amplification signal on the first side and a lead-in point of the first detection signal on the third side, and a lead-in point of the first detection signal on the third side is disposed between a lead-out point of the second output amplification signal on the second side and a lead-in point of the second detection signal on the third side.

31. The RF module according to claim 29,

wherein a first ground wiring to be connected to a ground voltage is connected to the third side between a lead-out point of the first output amplification signal on the first side and a lead-in point of the first detection signal on the third side, and a second ground wiring to be connected to the ground voltage is connected to the third side between a lead-out point of the second output amplification signal on the second side and a lead-in point of the second detection signal on the third side.

32. The RF module according to claim 30,

wherein a first ground wiring to be connected to a ground voltage is connected to the third side between the lead-out point of the first output amplification signal on the first side and the lead-in point of the first detection signal on the third side, and a second ground wiring to be connected to the ground voltage is connected to the third side between the lead-out point of the second output amplification signal on the second side and the lead-in point of the second detection signal on the third side.

33. The RF module according to claim 32,

wherein the first ground wiring is disposed adjacent to the third side and between the lead-in point of the second detection signal and the lead-in point of the first detection signal, and the second ground wiring is disposed adjacent to the third side and between the lead-in point of the first detection signal and the lead-in point of the second detection signal.

34. The RF module according to claim 28,

wherein the first frequency band RF signal is an RF transmission signal for GSM850 and GSM900, and the second frequency band RF signal is an RF transmission signal for DCS1800 and PCS1900.

35. The RF module according to claim 28,

wherein each of the first directional coupler and the second directional coupler is constituted of a microcoupler having a capacitive element connected between a main line and a sub line thereof.