SEMICONDUCTOR DEVICE

• US 20080136604A1
• Filed: 11/30/2007
• Published: 06/12/2008
• Est. Priority Date: 12/07/2006
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: KOZUMA, Munehiro, KUROKAWA, Yoshiyuki
• Granted Patent: US 8,487,745 B2
• Time in Patent Office: Days
• US Class Current: 340/10.51
• CPC Class Codes: H01M 10/425 Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing printed circuits H05K1/00
• CPC Class Codes: H01M 10/44 Methods for charging or discharging circuits for charging H02J7/00
• CPC Class Codes: H01M 10/46 Accumulators structurally combined with charging apparatus circuits for charging H02J7/00
• CPC Class Codes: Y02E 60/10 Energy storage using batteries

Abstract

Communication performance of the wireless tag is improved by providing an SRAM provided with an RF battery in the wireless tag provided with a CPU to speed up the CPU system. Moreover, rewriting of data in a memory of a wireless tag provided with a CPU is enabled. An RF battery includes an antenna circuit, a power supply portion, and a power storage device. A function as a non-volatile memory is provided to an SRAM by combining the SRAM and an RF battery.

Claims

1. A semiconductor device comprising:

an SRAM;

a central processing unit being configured to read data from the SRAM; and

a wireless power storage unit having an antenna circuit, the wireless power storage unit being configured to store electricity received by the antenna circuit and to supply the electricity to the SRAM.

2. The semiconductor device according to claim 1, wherein the antenna circuit comprises an antenna and a resonance circuit.

3. A semiconductor device comprising:

an SRAM;

a central processing unit being configured to read data from the SRAM; and

a wireless power storage unit having a power supply portion, an antenna circuit, and a power storage device, the wireless power storage unit being configured to supply electricity to the SRAM,

wherein the power supply portion is configured to convert an AC signal received by the antenna circuit to a DC signal and to control charging and discharging of the power storage device by using the DC signal.

4. The semiconductor device according to claim 3, wherein the power storage device comprises a battery or a capacitor.

5. The semiconductor device according to claim 3, wherein the antenna circuit comprises an antenna and a resonance circuit.

6. A semiconductor device comprising:

an SRAM;

a central processing unit being configured to read data from the SRAM; and

a wireless power storage unit having a power supply portion, an antenna circuit, and a power storage device, the wireless power storage unit being configured to supply electricity to the SRAM,

wherein the SRAM, the central processing unit, the power supply portion, the antenna circuit, and the power storage device are formed on a substrate.

7. The semiconductor device according to claim 6, wherein the power storage device comprises a battery or a capacitor.

8. The semiconductor device according to claim 6, wherein the substrate is one of a glass substrate, a quartz substrate, a plastic substrate, and a semiconductor substrate.

9. The semiconductor device according to claim 6, wherein the antenna circuit comprises an antenna and a resonance circuit.

10. A semiconductor device comprising:

an SRAM;

a central processing unit being configured to read data from the SRAM; and

a wireless power storage unit having a power supply portion, an antenna circuit, and a power storage device, the wireless power storage unit being configured to supply electricity to the SRAM,

wherein the SRAM, the central processing unit, the power supply portion, and the power storage device are formed on a first substrate, and

wherein the antenna circuit is formed on a second substrate.

11. The semiconductor device according to claim 10, wherein each of the first substrate and the second substrate is one of a glass substrate, a quartz substrate, a plastic substrate, and a semiconductor substrate.

12. The semiconductor device according to claim 10, wherein the power storage device comprises a battery or a capacitor.

13. The semiconductor device according to claim 10, wherein the antenna circuit comprises an antenna and a resonance circuit.

14. A semiconductor device comprising:

an SRAM;

a central processing unit being configured to read data from the SRAM; and

a wireless power storage unit having a power supply portion, an antenna circuit, and a power storage device, the wireless power storage unit being configured to supply electricity to the SRAM,

wherein the SRAM, the central processing unit, and the power supply portion are formed on a first substrate, and

wherein the antenna circuit and the power storage device are formed on a second substrate.

15. The semiconductor device according to claim 14, wherein each of the first substrate and the second substrate is one of a glass substrate, a quartz substrate, a plastic substrate, and a semiconductor substrate.

16. The semiconductor device according to claim 14, wherein the power storage device comprises a battery or a capacitol.

17. The semiconductor device according to claim 14, wherein the antenna circuit comprises an antenna and a resonance circuit.

18. An RFID system comprising:

a reader/writer; and

a semiconductor device comprising;

an SRAM;

a central processing unit being configured to read data from the SRAM; and

a wireless power storage unit having an antenna circuit,

wherein the antenna circuit receives reception signal transmitted from the reader/writer, and

wherein the wireless power storage unit is configured to store electricity received by the antenna circuit and to supply the electricity to the SRAM.

19. The RFID system according to claim 18, wherein the antenna circuit comprises an antenna and a resonance circuit.

20. A semiconductor device comprising:

an analog portion having an antenna circuit and a wireless power storage unit; and

a logic portion having a central processing unit and a memory,

wherein the central processing unit is configured to read data from the memory; and

wherein the wireless power storage unit is configured to store electricity received by the antenna circuit and to supply the electricity to the memory.

21. The semiconductor device according to claim 20, wherein the memory is a static random access memory

22. The semiconductor device according to claim 20, wherein the analog portion further comprises a power supply circuit, a reset circuit, a clock generation circuit, a demodulation circuit, a modulation circuit, and a power supply management circuit.

23. The semiconductor device according to claim 20, wherein the logic portion further comprises a mask ROM and a controller.

24. The semiconductor device according to claim 20, wherein the antenna circuit comprises an antenna and a resonance circuit.