Reducing noise during a gain change

• US 20080137784A1
• Filed: 12/08/2006
• Published: 06/12/2008
• Est. Priority Date: 12/08/2006
• Status: Active Grant

• Current Assignee: Silicon Laboratories Incorporated
• Original Assignee: Silicon Laboratories Incorporated
• Inventors: Krone, Andrew W.
• Granted Patent: US 7,729,675 B2
• Time in Patent Office: Days
• US Class Current: 375/345
• CPC Class Codes: H03G 3/3068 Circuits generating control signals for both R.F. and I.F. stages

Abstract

In one embodiment, the present invention includes a method for injecting a gain compensation value into a signal path of a receiver for a predetermined time when a change to a control value for an amplifier of the receiver occurs. This gain compensation value may be used to at least substantially remove a gain change caused by the change to the control value, improving audio performance by reducing or removing audible artifacts caused by the gain change.

Claims

1. An apparatus comprising:

a front end amplifier to adjust a level of an incoming radio signal;

an analog-to-digital converter (ADC) coupled to the front end amplifier to digitize the incoming radio signal and provide the digitized incoming radio signal to a signal path; and

a gain compensation input coupled to the signal path to provide a gain change compensation signal to remove a level change present in the incoming radio signal after a change to a control value for the front end amplifier.

2. The apparatus of claim 1, further comprising a gain compensation path coupled to the gain compensation input, the gain compensation path including:

a first summer to sum a compensation signal with a feedback signal;

a delay element coupled to an output of the first summer; and

a second summer coupled between an output of the delay element and the gain compensation input.

3. The apparatus of claim 2, further comprising a multiplier to generate the feedback signal coupled between the output of the delay element and the first summer.

4. The apparatus of claim 2, further comprising a controller to generate the control value for the front end amplifier and the compensation signal.

5. The apparatus of claim 4, wherein the controller is to generate the compensation signal for a sampling cycle of the incoming radio signal.

6. The apparatus of claim 5, wherein the gain change compensation signal is to decay over a predetermined time.

7. The apparatus of claim 1, further comprising a multiplier to combine the digitized incoming radio signal and the gain change compensation signal.

8. The apparatus of claim 7, further comprising a controller to provide the control value to the front end amplifier and a second control value to a digital amplifier coupled to the multiplier.

9. The apparatus of claim 8, further comprising a power detector to estimate a power level of an output of the digital amplifier.

10. The apparatus of claim 9, wherein the controller is to adjust a bandwidth of the power detector when the gain change compensation signal is present.

11. A method comprising:

injecting a gain compensation value into a signal path of a receiver for a predetermined time when a change to a control value for an analog amplifier occurs, the gain compensation value to at least substantially remove a gain change caused by the change to the control value.

12. The method of claim 11, further comprising providing a compensation signal to a filter and generating the gain compensation value based on an output of the filter.

13. The method of claim 12, further comprising decaying an output of the filter and providing the decayed output to the filter.

14. The method of claim 12, further comprising providing the compensation signal for a sampling cycle of the receiver.

15. The method of claim 14, further comprising controlling the gain compensation value from an initial value to a predetermined final value at which the gain change propagates along the signal path to a digital gain block.

16. An integrated circuit comprising:

a first amplifier to receive a radio frequency (RF) signal, the first amplifier controlled by a first control value;

a digitizer to digitize an output of the first amplifier;

a gain compensation circuit to generate a compensation value having an inversely proportional relationship to a change to the first control value; and

a combiner to combine the outputs of the digitizer and the compensation value.

17. The integrated circuit of claim 16, further comprising a second amplifier coupled to an output of the combiner, the second amplifier controlled by a second control value.

18. The integrated circuit of claim 17, wherein the second amplifier comprises a digital amplifier to output a signal at a substantially constant volume.

19. The integrated circuit of claim 17, further comprising a controller to generate the first control value and the second control value, the controller to further provide a compensation signal to the gain compensation circuit.

20. The integrated circuit of claim 19, wherein the controller is to provide the compensation signal for a predetermined time after a change to the first control value.

21. A system comprising:

a receiver to receive an amplitude modulated (AM) signal, the receiver including;

a first amplifier to amplify the AM signal, the first amplifier controlled by a first control value;

a mixer to downconvert the AM signal to a second frequency signal;

a digitizer to digitize the second frequency signal;

a gain compensator to generate a compensation value based on a change to the first control value;

a combiner to combine the outputs of the digitizer and the gain compensator; and

an automatic volume controller (AVC) to receive the combiner output and provide an output signal at a substantially constant volume; and

an output device to output the output signal.

22. The system of claim 21, wherein the gain compensator comprises:

a first summer to sum a compensation signal with a feedback signal;

a delay element coupled to an output of the first summer; and

a second summer coupled between an output of the delay element and the combiner.

23. The system of claim 21, wherein the AVC comprises:

a multiplier to receive the combiner output and a second control value and to output the output signal at the substantially constant volume; and

a power estimator coupled to an output of the multiplier to estimate a power level of the AM signal, the power estimator including a filter having an adjustable bandwidth, wherein the bandwidth is to be widened when the gain compensator is active.

24. The system of claim 21, further comprising a digital signal processor including the gain compensator and the AVC.

25. The system of claim 21, wherein the system comprises a portable device having an integrated circuit (IC) including the receiver, wherein the receiver is controlled to receive the AM signal or a frequency modulation (FM) signal.

26. The system of claim 21, wherein the system includes a storage to a store a first code portion to perform signal processing in a digital signal processor of the system in an AM mode and a second code portion to perform signal processing in the digital signal processor in an FM mode based on user control.