Systems and Arrangements for Clock and Data Recovery in Communications

• US 20080137789A1
• Filed: 12/11/2006
• Published: 06/12/2008
• Est. Priority Date: 12/11/2006
• Status: Active Grant

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: International Business Machines Corporation
• Inventors: Friedman, Daniel J., Toifl, Thomas H., Meghelli, Mounir, Cranford, Hayden C.
• Granted Patent: US 7,983,368 B2
• Time in Patent Office: Days
• US Class Current: 375/354
• CPC Class Codes: H04L 7/0004 Initialisation of the receiver H04L7/0075 and H04L7/10 take precedence
• CPC Class Codes: H04L 7/0334 Processing of samples having at least three levels, e.g. soft decisions
• CPC Class Codes: H04L 7/042 Detectors therefor, e.g. correlators, state machines digital correlators in general G06F17/15

Abstract

A sampling clock signal controller for receivers of digital data is disclosed. Specific bit patterns of a data waveform can be identified, and stored time samples of the waveform that correspond to the specific bit patterns can be analyzed to improve the timing of a sampling clock signal. These “time-amplitude” samples on known bit patterns can be utilized to determine if a sample on the data waveform should be taken before the center of the eye pattern, at the center of the eye pattern, or after the center of the eye pattern and by what time change. Accordingly, a single low power clock can be utilized to adjust the timing of the sample clock such that improved communication scan be achieved. Such a single clock system has reduced power requirements and increased accuracy.

Claims

1. A method for generating a sampling clock signal comprising:

storing a predetermined bit pattern;

receiving a waveform;

acquiring time-amplitude samples on the waveform;

detecting an occurrence of the predetermined bit pattern in the received waveform;

analyzing the time-amplitude samples responsive to the detected occurrence of the predetermined bit pattern; and

adjusting a timing of a sampling clock responsive to the analyzing of the time-amplitude samples.

2. The method of claim 1, further comprising:

storing a second predetermined bit pattern;

detecting an occurrence of the second predetermined bit pattern;

storing time-amplitude samples associated with the second predetermined bit pattern; and

readjusting the timing of the sampling clock based on the occurrence of the second predetermined bit pattern and the time-amplitude samples associated with the second predetermined bit pattern.

3. The method of claim 1, further comprising bit filtering the waveform to determine the occurrence of the first predetermined bit pattern.

4. The method of claim 1, further comprising advancing the timing of a sampling clock based on the analyzing determining that the waveform is advanced in time.

5. The method of claim 1, further comprising retarding the timing of a sampling clock based on the analyzing determining that the waveform is lagging in time.

6. The method of claim 1, adjusting a time and an amplitude where the time-amplitude-samples are taken.

7. An apparatus comprising:

a logic module to control a time-amplitude testing routine on a waveform and to acquire time-amplitude data;

a bit pattern filter to identify bit patterns provided by the waveform, the bit patterns identified based on a predetermined bit pattern; and

a clock synchronizer to modify a sampling clock timing signal in response to detection of the predetermined bit pattern and the time-amplitude data.

8. The apparatus of claim 7, further comprising a clock generator to generate the sampling clock timing signal.

9. The apparatus of claim 7, further comprising a first latch to accept and store the time-amplitude data responsive to the time-amplitude test routine.

10. The apparatus of claim 9, further comprising a second latch to accept and store a second time-amplitude sample responsive to the time-amplitude test routine.

11. The apparatus of claim 7, further comprising compare logic to determine if the time-amplitude sample has a voltage that is greater than a predetermined voltage as determined by the time-amplitude test routine.

12. The apparatus of claim 7, further comprising an adder to add a negative offset voltage to a voltage of the waveform during a time-amplitude sampling period such that varying time-amplitude test points are acquired based on the offset voltage.

13. The apparatus of claim 12, wherein the logic module controls the offset voltage.

14. The apparatus of claim 7, wherein the logic module further comprises a low pass filter.

15. The apparatus of claim 7, wherein the bit pattern filter identifies large transitions.

16. A communication system comprising:

a transmitter to transmit data, the data having bit patterns;

memory to store at least one predetermined bit pattern;

a receiver to acquire time-amplitude samples and to generate a clock modification signal in response to detection of the at least one predetermined bit pattern and an analysis on the acquire time-amplitude samples; and

a data sampling clock coupled to the receiver to utilize the clock modification signal to modify properties of the data sampling clock.

17. The communication system of claim 16, further comprising a test pattern clock and a delay module coupled to the receiver, wherein the test pattern clock can provide a clock signal to the delay module such that the acquisition time of the time-amplitude samples can be varied.

18. The communication system of claim 16, further comprising a first latch coupled to the receiver to receive logic signals and a second latch to receive amplitude modified logic signals from the transmission line, the second latch coupled to an amplitude sampler control loop such that that acquisition voltage amplitude of the time-amplitude sample can be varied.

19. The communication system of claim 16, further comprising an adder coupled to the second latch to subtract a predetermined voltage from the voltage of a sampled waveform.

20. The communication system of claim 16, wherein the receiver utilizes a time-amplitude testing sequence to acquire a plurality of time-amplitude samples.