Switched impedance transformer for semiconductor circuits

• US 20080139131A1
• Filed: 12/11/2006
• Published: 06/12/2008
• Est. Priority Date: 12/11/2006
• Status: Active Grant

• Current Assignee: SIGE Semiconductor Limited (Skyworks Solutions Incorporated)
• Original Assignee: SIGE Semiconductor Limited (Skyworks Solutions Incorporated)
• Inventors: Macphail, Philip
• Granted Patent: US 7,616,934 B2
• Time in Patent Office: Days
• US Class Current: 455/90.2
• CPC Class Codes: H01F 2017/0046 with a conductive path having a bridge
• CPC Class Codes: H01F 30/04 having two or more secondary windings, each supplying a separate load, e.g. for radio set power supplies
• CPC Class Codes: H03F 1/02 Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
• CPC Class Codes: H03F 1/565 using inductive elements
• CPC Class Codes: H03F 2200/318 A matching circuit being used as coupling element between two amplifying stages
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2200/534 Transformer coupled at the input of an amplifier
• CPC Class Codes: H03F 2200/537 A transformer being used as coupling element between two amplifying stages
• CPC Class Codes: H03F 2200/541 Transformer coupled at the output of an amplifier
• CPC Class Codes: H03F 3/195 in integrated circuits
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03H 7/40 Automatic matching of load impedance to source impedance

Abstract

A method of providing an impedance match for an integrated semiconductor circuit to other microwave elements is provided by allowing the selection of one of a plurality of impedance matching ratios between the circuit and other elements. The tunable impedance match comprises a microwave impedance transformer with at least a single primary winding, and a plurality of secondary windings, wherein the winding configuration is determined by an electrical switching apparatus allowing the secondary windings to be connected in series, parallel and combinations thereof to provide the required impedance matching. The method allows for both dynamic matching of an integrated semiconductor circuit for increased efficiency, and hence reduced power consumption, and directly matching said circuit to high impedance antennae etc.

Claims

1. A circuit comprising:

a carrier;

an input port for receiving an input RF signal;

an output port supporting each of a predetermined set of available impedance characteristics for providing an output RF signal based on the input RF signal;

a first conductor disposed upon the carrier for transmission of the input RF signal;

a second conductor disposed upon the carrier for being inductively coupled to the first conductor;

a third conductor disposed upon the carrier for being inductively coupled to the first conductor;

at least a switch operable between a first state and a second state, the at least a switch for in the first state resulting in the second conductor and third conductor electrically coupled in series and wherein, in the first state, the first conductor and the second and third conductors are electrically coupled between the input port and the output port for providing a first impedance characteristic from the predetermined set of available impedance characteristics at the output port; and

for in the second state resulting in a the second and third conductors electrically coupled in parallel, and wherein, in the second state, the first conductor and the second and third conductors are electrically coupled between the input port and the output port for providing a second other impedance characteristic from the predetermined set of available impedance characteristics at the output port.

2. A circuit according to claim 1 wherein, the first conductor, the second conductor, and the third conductor are inter-wound spiral conductors integrated on a common surface.

3. A circuit according to claim 2 wherein the carrier comprises a substrate, the substrate having integrated thereon the input port, the output port, the first conductor, the second conductor, the third conductor, and the at least a switch.

4. A circuit according to claim 1 wherein, the circuit is manufactured using a semiconductor technology.

5. A circuit according to claim 4 wherein, the semiconductor technology relates to at least one of Si, SiGe, GaAs and InP.

6. A circuit according to claim 1 wherein the carrier is formed of a dielectric material.

7. A circuit according to claim 6 wherein, the first conductor, the second conductor, and the third conductor are manufactured using at least one of thick-film and thin-film processes.

8. A circuit according to claim 6 wherein, the at least a switch comprises a component.

9. A circuit according to claim 1 wherein,

the first conductor is disposed on a first surface of the carrier;

and,

the second conductor is disposed on a second other surface of the carrier;

10. A circuit according to claim 9 wherein the third conductor is disposed on a third other surface of the carrier.

11. A circuit according to claim 9 wherein the third conductor is disposed on the second other surface of the carrier.

12. A circuit according to claim 9 wherein third conductor is disposed on the first surface of the carrier.

13. A circuit according to claim 10 wherein the first surface is disposed between the second and third surfaces of the carrier.

14. A circuit according to claim 9 wherein the first conductor, the second conductor, and the third conductor are approximately in the form of a spiral.

15. A circuit according to claim 9 wherein any spacing between the surfaces has some dielectric material disposed therein.

16. A circuit according to claim 1 wherein the second conductor comprises an electrical tap, the electrical tap defining at least first and second portions of the second conductor for electrical connection by the at least a switch in conjunction with the first and third conductors to provide a plurality of electrical configurations, each electrical configuration providing an impedance characteristic from the predetermined set of available impedance characteristics at the output port.

17. A circuit according to claim 1 comprising:

a microwave circuit electrically connected to at least one of the input and output ports of the circuit for operating upon the RF signal.

18. A circuit according to claim 1 comprising:

a switch control circuit electrically coupled to the at least a switch, the switch control circuit having a switch setting port for receiving a switch setting signal and for providing a control signal for controlling the at least a switch in response to the switch setting signal.

19. A circuit according to claim 18 wherein, the switch setting signal is established in relation to at least one of a measurement of reflected power from the output port, a measurement of the transmitted power from the output port, and the target output power of the circuit.

20. A circuit comprising:

a substrate;

an input port integrated within the substrate for receiving an input RF signal;

an output port integrated within the substrate supporting each of a predetermined set of available impedance characteristics for providing an output RF signal based on the input RF signal;

a first electrical track integrated within the substrate for transmission of the input RF signal;

a second electrical track integrated within the substrate for being inductively coupled to the first electrical track;

a third electrical track integrated within the substrate for being inductively coupled to the first electrical track;

at least a switch integrated within the substrate, the at least a switch operable between a first state and a second state, the at least a switch for in the first state resulting in the second electrical track and third electrical track electrically coupled in a first configuration and wherein, in the first state, the first electrical track and the second and third electrical tracks are electrically coupled between the input port and the output port for providing a first impedance characteristic from the predetermined set of available impedance characteristics at the output port; and

for in the second state resulting in a the second and third electrical track electrically coupled in a second configuration, and wherein, in the second state, the first electrical track and the second and third electrical tracks are electrically coupled between the input port and the output port for providing a second other impedance characteristic from the predetermined set of available impedance characteristics at the output port.

21. A circuit according to claim 20 wherein;

the first configuration is one of a series or parallel combination of the second and third electrical tracks.

22. A circuit according to claim 21 wherein;

the second configuration is the other of series or parallel combination of the second and third electrical tracks.

23. A circuit according to claim 20 wherein;

the first electrical track, the second electrical track, and the third electrical track are inter-wound spiral conductors disposed on a common surface of the substrate.

24. A circuit according to claim 20 wherein;

the first electrical track is disposed on a first surface of the substrate; and

,

the second electrical track is disposed on a second surface of the substrate.

25. A circuit according to claim 24 wherein

the third electrical track is disposed on a third surface of the substrate.

26. A circuit according to claim 24 wherein;

the third electrical track is disposed on the second surface of the substrate.

27. A circuit according to claim 24 wherein;

the third electrical track is disposed on the first surface of the substrate.

28. A circuit according to claim 24 wherein;

the first surface is disposed between the second and third surfaces of the substrate.

29. A circuit according to claim 24 wherein;

the first to third electrical tracks are spirals.

30. A circuit according to claim 24 wherein;

any spacing between the surfaces has some dielectric material disposed therein.

31. A circuit according to claim 20 wherein

the second electrical track comprises an electrical tap, the electrical tap defining at least first and second portions of the second electrical track for electrical connection by the at least a switch in conjunction with the first and third electrical tracks to provide a plurality of electrical configurations, each electrical configuration providing an impedance characteristic from the predetermined set of available impedance characteristics at the output port.

32. A circuit according to claim 20 further comprising:

a microwave circuit electrically connected to at least one of the input or output ports of the circuit for operating on the RF signal.

33. A circuit according to claim 20 wherein:

the circuit is manufactured using a semiconductor technology.

34. A circuit according to claim 20 wherein:

the semiconductor technology relates to at least one of Si, SiGe, GaAs and InP.

35. A circuit according to claim 21 further comprising

a switch control circuit electrically connected to the at least a switch, the switch control circuit having a switch setting port for receiving a switch setting signal and for providing a control signal for controlling the at least a switch in response to the switch setting signal.

36. A circuit according to claim 35 wherein;

the switch setting signal is established in relation to at least one a measurement of the reflected power from the output port, a measurement of the transmitted power from the output port, and the target output power of the circuit.

37. A method of providing a switchable impedance transformer for an RF circuit by:

providing a substrate;

providing an input port integrated within the substrate for receiving an input RF signal;

providing an output port integrated within the substrate supporting each of a predetermined set of available impedance characteristics for providing an output RF signal based on the input RF signal;

providing a first electrical track integrated within the substrate for transmission of the input RF signal;

providing a second electrical track integrated within the substrate for being inductively coupled to the first electrical track;

providing a third electrical track integrated within the substrate for being inductively coupled to the first electrical track;

providing at least a switch integrated within the substrate, the at least a switch operable between a first state and a second state;

wherein

the at least a switch in the first state resulting in a first configuration of the second and third electrical tracks and providing a first impedance characteristic from the predetermined set of available impedance characteristics at the output port; and

the at least a switch in the second state resulting in a second configuration of the second and third electrical tracks and providing a second other impedance characteristic from the predetermined set of available impedance characteristics at the output port.

38. A method according to claim 37 wherein;

providing the first configuration of the at least a switch is by one of a series or parallel combination of the second and third electrical tracks.

39. A method according to claim 38 wherein;

providing the second configuration of the at least a switch is other of series or parallel combination of the second and third electrical tracks.

40. A method according to claim 37 wherein;

providing the first electrical track, the second electrical track, and the third electrical track is achieved by implementing inter-wound spiral conductors disposed on a common surface of the substrate.

41. A method according to claim 37 wherein;

providing the first electrical track is by disposing the first electrical track on a first surface of the substrate; and

providing the second electrical track is by disposing the second electrical track on a second surface of the substrate.

42. A method according to claim 41 wherein

providing the third electrical track is by disposing the third electrical track on a third surface of the substrate.

43. A method according to claim 41 wherein;

providing the third electrical track is by disposing the third electrical track on the second surface of the substrate.

44. A method according to claim 41 wherein;

providing the third electrical track is by disposing the third electrical track on the first surface of the substrate.

45. A method according to claim 41 wherein;

providing the first surface is achieved by disposing the first surface between the second and third surfaces of the substrate.

46. A method according to claim 41 wherein;

providing the first electrical track, second electrical track, and third electrical track is by providing spiral conductors.

47. A method according to claim 41 wherein;

the step of providing any of the first surface, second surface and third surface with any spacing between the surfaces is achieved by providing a dielectric material disposed therein.

48. A method according to claim 37;

wherein the step of providing the second electrical tracks includes providing at least an electrical tap, the electrical tap for defining at least first and second portions of the second electrical track; and

further providing for electrical connection by the at least a switch in conjunction with the first electrical track and third electrical track to provide a plurality of configurations, each configuration providing a impedance characteristic from the predetermined set of available impedance characteristics at the output port.

49. A method according to claim 37 further comprising;

providing a microwave circuit electrically connected to at least one of the input or output ports of the circuit for operating upon the RF signal.

50. A method according to claim 37 wherein;

the steps of providing the input port, the output port, the first electrical track, the second electrical track, the third electrical track and the at least a switch is achieved by using a semiconductor manufacturing technology.

51. A circuit according to claim 50 wherein;

the semiconductor manufacturing technology relates to at least one of Si, SiGe, GaAs and Inp.

52. A method according to claim 37 further comprising

providing a switch control circuit electrically connected to the at least a switch, the switch control circuit having a switch setting port for receiving a switch setting signal and providing a control signal for controlling the at least a switch in relation to the switch setting signal.

53. A method according to claim 52 wherein;

the step of providing the switch setting signal is by providing a signal in relation to at least one of a measurement of reflected power from the output port, a measurement of the transmitted power from the output port, and the target output power of the circuit.

54. A memory storage having instruction data stored therein for when executed resulting in a circuit comprising:

a substrate;

an input port integrated within the substrate for receiving an input RF signal;

an output port integrated within the substrate supporting each of a predetermined set of available impedance characteristics for providing an output RF signal based on the input RF signal;

a first electrical track integrated within the substrate for transmission of the input RF signal;

a second electrical track integrated within the substrate for being inductively coupled to the first electrical track;

a third electrical track integrated within the substrate for being inductively coupled to the first electrical track;

at least a switch integrated within the substrate, the at least a switch operable between a first state and a second state, the at least a switch for in the first state resulting in the second electrical track and third electrical track electrically coupled in a first configuration and wherein, in the first state, the first electrical track and the second and third electrical tracks are electrically coupled between the input port and the output port for providing a first impedance characteristic from the predetermined set of available impedance characteristics at the output port; and

for in the second state resulting in a the second and third electrical track electrically coupled in a second configuration, and wherein, in the second state, the first electrical track and the second and third electrical tracks are electrically coupled between the input port and the output port for providing a second other impedance characteristic from the predetermined set of available impedance characteristics at the output port.