Thin film transistor, thin film transistor substate, and method of manufacturing the same

• US 20080142797A1
• Filed: 12/06/2007
• Published: 06/19/2008
• Est. Priority Date: 12/14/2006
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Lee, Je-Hun, Jeong, Chang-Oh, Lee, Eun-Guk, Kim, Do-Hyun, Lim, Soon-Kwon
• Granted Patent: US 7,923,287 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A thin film transistor substrate and a method of manufacturing the same are disclosed. The method of manufacturing a thin film transistor substrate includes forming a first conductive pattern group including a gate line, a gate electrode, and a lower gate pad electrode on a substrate, forming a gate insulating layer on the substrate on which the first conductive pattern group is formed, forming an oxide semiconductor pattern overlapping the gate electrode on the gate insulating layer, and forming first and second conductive layers on the substrate on which the oxide semiconductor pattern is formed and patterning the first and second conductive layers to form a second conductive pattern group including a data line, a source electrode, a drain electrode, and a data pad.

Claims

1. A method of manufacturing a thin film transistor substrate, comprising:

forming on a surface of a substrate a first conductive pattern group including a gate line, a gate electrode, and a gate pad electrode;

forming a gate insulating layer on the surface of the substrate on which the first conductive pattern group is formed;

forming on the gate insulating layer an oxide semiconductor pattern overlapping the gate electrode; and

forming first and second conductive layers on the surface of the substrate on which the oxide semiconductor pattern is formed and patterning the first and second conductive layers to form a second conductive pattern group including a data line, a source electrode, a drain electrode, and a data pad.

2. The method of claim 1, wherein the first conductive layer is formed of a transparent conductive material and the second conductive layer is formed of a metal material.

3. The method of claim 2, further comprising forming a pixel electrode connected to the drain electrode, the pixel electrode being formed of the first conductive layer in an area defined by an intersection of the gate line and the data line.

4. The method of claim 1, wherein the first conductive layer contacts the oxide semiconductor pattern in an area where the source electrode and the drain electrode are formed.

5. The method of claim 1, wherein the first conductive layer is formed of:

polycrystalline indium tin oxide, indium tin oxide or indium zinc oxide.

6. The method of claim 1, wherein the second conductive layer is formed of a material selected from the group consisting of Cu, Mo, Al, Ti, Al—

Ni alloy, Cu alloy, Mo alloy, and Al alloy.

7. The method of claim 1, wherein the oxide semiconductor pattern comprises an oxide semiconductor layer including a zinc oxide based substance.

8. The method of claim 7, wherein forming the oxide semiconductor pattern comprises:

forming an oxide semiconductor layer on the gate insulating layer;

forming on the oxide semiconductor layer first and second photoresist patterns which have different thicknesses;

forming a contact hole exposing the lower gate pad electrode by etching the oxide semiconductor layer and the gate insulating layer using the first and second photoresist patterns as a mask;

removing the thinner one of the first and second photoresist patterns by ashing the first and second photoresist patterns; and

forming the oxide semiconductor pattern by removing the oxide semiconductor layer exposed via a portion of the removed second photoresist pattern.

9. The method of claim 1, wherein the forming the second conductive pattern group further comprises polymerizing an amorphous transparent electrode by thermally treating the first conductive layer at high temperature.

10. The method of claim 1, further comprising forming a column spacer made of an organic insulating layer on the source electrode and the drain electrode.

11. A thin film transistor substrate comprising:

a gate line and a gate electrode formed on a substrate;

a gate insulating layer formed on the gate line and the gate electrode;

an oxide semiconductor layer overlapping the gate electrode on the gate insulating layer;

a data line, a source electrode, and a drain electrode formed of first and second conductive layers on the oxide semiconductor layer and the gate insulating layer; and

a pixel electrode connected to the drain electrode and formed of the first conductive layer.

12. The thin film transistor substrate of claim 11, wherein the first conductive layer is formed of a transparent conductive material and the second conductive layer is formed of a metal material.

13. The thin film transistor substrate of claim 12, the first conductive layer is formed of polycrystalline indium tin oxide, indium tin oxide or indium zinc oxide.

14. The thin film transistor substrate of claim 12, wherein the second conductive layer is formed of a material selected from the group consisting of Cu, Mo, Al, Ti, Al—

Ni alloy, Cu alloy, Mo alloy, and Al alloy.

15. The thin film transistor substrate of claim 11, further comprising a gate pad formed at one end of the gate line, wherein the gate pad is comprised of a lower gate pad electrode and an upper gate pad electrode that is connected to the lower gate pad electrode and formed of the first conductive layer.

16. The thin film transistor substrate of claim 11, further comprising a column spacer formed of an organic insulating layer on the source and drain electrodes.

17. The thin film transistor substrate of claim 11, wherein the oxide semiconductor layer comprises a zinc oxide based substance.

18. The thin film transistor substrate of claim 11, further comprising a data pad formed at one end of the data line.

19. A thin film transistor comprising:

a gate electrode;

a gate insulating layer formed on the gate electrode;

an oxide semiconductor layer overlapping the gate electrode on the gate insulating layer; and

a source electrode and a drain electrode formed of first and second conductive layers on the oxide semiconductor layer.

20. The thin film transistor of claim 19, wherein the first conductive layer is formed of a transparent conductive material of polycrystalline indium tin oxide, indium tin oxide or indium zinc oxide, and the second conductive layer is formed of a metal material selected from the group consisting of Cu, Mo, Al, Ti, Al—

Ni alloy, Cu alloy, Mo alloy, and Al alloy.