SEMICONDUCTOR INTEGRATED CIRCUIT FOR DETECTING MAGNETIC FIELD

• US 20080143329A1
• Filed: 11/29/2007
• Published: 06/19/2008
• Est. Priority Date: 12/14/2006
• Status: Abandoned Application

• Current Assignee: DENSO Corporation
• Original Assignee: DENSO Corporation
• Inventors: Ishihara, Masato
• Application Number:
  US11/947,521
• Publication Number:
  US 20080143329A1
• Time in Patent Office: Days
• US Class Current: 324/251
• CPC Class Codes: G01R 15/202 using Hall-effect devices Hall elements in arrangements for measuring electrical power G01R21/08
• CPC Class Codes: G01R 15/207 Constructional details independent of the type of device used
• CPC Class Codes: G01R 33/07 Hall effect devices

Abstract

A semiconductor integrated circuit for detecting a magnetic field includes: a magneto-electric conversion element for detecting the magnetic field and converting a detected magnetic field to an electric signal, a conductive pattern for flowing a test current therethrough, the conductive pattern disposed around the magneto-electric conversion element; a detection element for detecting the electric signal of the magneto-electric conversion element when the test current flows through the conductive pattern; and an output element for outputting a test result based on the electric signal detected by the detection element

Claims

1. A semiconductor integrated circuit for detecting a magnetic field comprising:

a magneto-electric conversion element for detecting the magnetic field and converting a detected magnetic field to an electric signal;

a conductive pattern for flowing a test current therethrough, the conductive pattern disposed around the magneto-electric conversion element;

a detection element for detecting the electric signal of the magneto-electric conversion element when the test current flows through the conductive pattern; and

an output element for outputting a test result based on the electric signal detected by the detection element.

2. The circuit according to claim 1, wherein

the test current is constant.

3. The circuit according to claim 1, further comprising:

a current application circuit for applying the test current to the conductive pattern.

4. The circuit according to claim 1, wherein

the test current is supplied from an external circuit.

5. The circuit according to claim 1, wherein

the conductive pattern is provided by a wiring layer in a multi-layered semiconductor chip.

6. The circuit according to claim 5, wherein

the wiring layer is made of one of a metallic layer and a poly crystalline silicon layer, a metallic layer, and a poly crystalline silicon layer

7. The circuit according to claim 5, wherein

the magneto-electric conversion element is provided by a thin plate layer in the multi-layered semiconductor chip, and

the conductive pattern is disposed on a side of the magneto-electric conversion element.

8. The circuit according to claim 7, wherein

the conductive pattern is disposed along with a periphery of the magneto-electric conversion element.

9. The circuit according to claim 1, wherein

the conductive pattern has a rectangular shape.

10. The circuit according to claim 9, wherein

the conductive pattern has a partially rounded U shape or a rounded C shape.

11. The circuit according to claim 9, wherein

the conductive pattern provides a coil.

12. The circuit according to claim 7, wherein

the magneto-electric conversion element and the conductive pattern are disposed on a same layer in the multi-layered semiconductor chip.

13. The circuit according to claim 7, wherein

the magneto-electric conversion element and the conductive pattern are disposed on different layers in the multi-layered semiconductor chip, respectively.

14. The circuit according to claim 1, wherein

the magneto-electric conversion element is a Hall element.

15. The circuit according to claim 14, wherein

the Hall element is made of one of silicon, InAs and GaAs.

16. The circuit according to claim 1, wherein

the magneto-electric conversion element is a magneto resistive effect element or a magneto impedance element.

17. The circuit according to claim 1, further comprising:

a lead frame as an inner wiring, wherein

the lead frame provides the conductive pattern.

18. The circuit according to claim 1, further comprising:

a capacitor to be energized from an external circuit, wherein

the capacitor flows the test current in the conductive pattern when the capacitor is charged.

19. A semiconductor integrated circuit for detecting a magnetic field comprising:

a Hall element for detecting the magnetic field and converting a detected magnetic field to an electric signal;

a bus bar for flowing a constant test current therethrough, the bus bar surrounding the Hall element; and

a circuit having a detection portion, an output portion and a current application circuit, wherein

the current application circuit applies the constant test current to the bus bar,

the detection portion detects the electric signal of the Hall element when the constant test current flows through the bus bar,

the bus bar has one of an angulated C shape, an rounded C shape, or a partially rounded U shape,

the detection portion determines that the Hall element is normal when a voltage change of the electric signal before and after application of the test current is equal to or smaller than a predetermined threshold value,

the detection portion determines that the Hall element is abnormal when the voltage change is larger than the predetermined threshold value, and

the output portion outputs a test result that the Hall element is normal or abnormal.