CLOSED LOOP FEEDBACK CONTROL OF INTEGRATED CIRCUITS

• US 20080143372A1
• Filed: 02/26/2008
• Published: 06/19/2008
• Est. Priority Date: 04/16/2002
• Status: Active Grant

• Current Assignee: Meta Platforms, Inc. (f/k/a Facebook, Inc.)
• Original Assignee: Transmeta Corporation (Novafora, Inc.)
• Inventors: Koniaris, Kleanthes G., Burr, James B.
• Granted Patent: US 7,671,621 B2
• Time in Patent Office: Days
• US Class Current: 324/769
• CPC Class Codes: G01R 31/2621 for testing field effect transistors, i.e. FET's
• CPC Class Codes: G05B 13/021 in which a variable is automatically adjusted to optimise the performance
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: H03K 3/012 Modifications of generator to improve response time or to decrease power consumption
• CPC Class Codes: H03K 3/0315 Ring oscillators
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Systems and methods for closed loop feedback control of integrated circuits. In one embodiment a plurality of controllable inputs to an integrated circuit is adjusted to achieve a predetermined value of a dynamic operating indicator of the integrated circuit. An operating condition of an integrated circuit is controlled via closed loop feedback based on dynamic operating indicators of the integrated circuit'"'"'s behavior.

Claims

1. A method of operating an integrated circuit, said method comprising:

measuring a dynamic operating indicator of said integrated circuit; and

adjusting a plurality of controllable inputs to said integrated circuit to approach a predetermined value of said dynamic operating indicator of said integrated circuit.

2. A method as described in claim 1 further comprising accessing said predetermined value from a computer usable media.

3. A method as described in claim 2 further comprising periodically repeating said measuring and said adjusting.

4. A method as described in claim 1 wherein said plurality of controllable inputs comprises an operating voltage of said integrated circuit.

5. A method as described in claim 1 wherein said plurality of controllable inputs comprises a body bias voltage.

6. A method as described in claim 5 wherein said body bias voltage comprises a voltage applied to an n type metal oxide semiconductor device of said integrated circuit.

7. A method as described in claim 5 wherein said body bias voltage comprises a voltage applied to a p type metal oxide semiconductor device of said integrated circuit.

8. A method as described in claim 1 further comprising determining said predetermined value of a dynamic operating indicator of said integrated circuit.

9. A method as described in claim 8 further comprising storing said predetermined value of a dynamic operating indicator of said integrated circuit in a computer usable media.

10. A method as described in claim 2 wherein said dynamic operating indicator indicates a gate delay of said integrated circuit.

11. A method as described in claim 2 wherein said dynamic operating indicator indicates an off current of said integrated circuit.

12. A method as described in claim 2 wherein said dynamic operating indicator indicates a gate leakage of said integrated circuit.

13. A method as described in claim 2 wherein said dynamic operating indicator indicates a relative behavior of NMOS devices and PMOS devices of said integrated circuit.

14. A system for operating an integrated circuit, said system comprising:

circuitry for measuring a current dynamic operation indicator of said integrated circuit; and

a feedback loop coupled to said circuitry, said feedback loop for optimizing a dynamic operating indicator of said integrated circuit toward a predetermined value of said dynamic operating indicator by controlling a plurality of controllable inputs to said integrated circuit.

15. A system as described in claim 14 further comprising a computer usable media to store said predetermined value of said dynamic operating indicator.

16. A system as described in claim 14 wherein said plurality of controllable inputs comprises an operating voltage of said integrated circuit.

17. A system as described in claim 14 wherein said plurality of controllable inputs comprises a body bias voltage.

18. A system as described in claim 17 wherein said body bias voltage comprises a voltage applied to an n type metal oxide semiconductor device of said integrated circuit.

19. A system as described in claim 17 wherein said body bias voltage comprises a voltage applied to a p type metal oxide semiconductor device of said integrated circuit.

20. A system as described in claim 14 wherein said dynamic operating indicator indicates a gate delay of said integrated circuit.