CIRCUIT BOARD WITH IMPROVED GROUND PLANE

• US 20080151521A1
• Filed: 04/19/2007
• Published: 06/26/2008
• Est. Priority Date: 12/22/2006
• Status: Active Grant

• Current Assignee: Gold Charm Limited (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Hon Hai Precision Industry Co., Ltd.
• Inventors: LIN, YU-HSU, WU, JENG-DA, CHAO, CHIH-HANG
• Granted Patent: US 7,663,063 B2
• Time in Patent Office: Days
• US Class Current: 361/777
• CPC Class Codes: H05K 1/0224 Patterned shielding planes, ground planes or power planes H05K1/0253 takes precedence
• CPC Class Codes: H05K 1/0253 Impedance adaptations of transmission lines by special lay-out of power planes, e.g. providing openings H05K1/0251 takes precedence
• CPC Class Codes: H05K 2201/09681 Mesh conductors, e.g. as a ground plane

Abstract

A circuit board is provided for improving signal quality, including a signal plane for a plurality of signal traces arranged thereon and a ground plane formed by a plurality of tiles connected to each other in an array. Each tile is formed by ground traces. Different line segments of a signal trace mapped on the ground plane cross ground traces of the tiles at similar angles, thereby minimizing interaction between the ground traces and the signal traces to reduce differences in impedances of the signal traces.

Claims

1. A circuit board, comprising:

a signal plane for a plurality of signal traces arranged thereon, each of the signal traces comprising a plurality of straight line segments; and

a ground plane comprising a plurality of tiles connected to each other in an array, each tile formed by ground traces, different line segments of a signal trace mapped on the ground plane substantially crossing through any given ground trace of the tiles, thereby minimizing interaction between the ground traces and the signal traces to reduce differences in impedances of the signal traces.

2. The circuit board as described in claim 1, wherein each tile is a polygon delimited by a plurality of straight ground traces connected consecutively end-to-end.

3. The circuit board as described in claim 2, wherein each tile is an equilateral polygon formed by equal sized ground traces.

4. The circuit board as described in claim 2, wherein each line segment of the signal trace mapped on the ground plane is at an angle of at least about 7.5 degrees relative to any given ground trace being crossed.

5. The circuit board as described in claim 2, wherein the ground plane defines a horizontal X-axis along which some of the line segments of one of the signal traces are arranged, a Y-axis being perpendicular to the X-axis, straight line segments of each signal trace being arranged on the signal plane at angles of 0, 30, 45, 60, 90 , −

30, −

45, −

60 degrees relative to the X-axis of the ground plane, a Y′

-axis being defined by a straight line passing through one ground trace of one tile, the Y′

-axis being rotated 22.5 degrees relative to the Y-axis of the ground plane.

6. The circuit board as described in claim 1, wherein each tile is formed by a plurality of curved ground traces connected consecutively end-to-end.

7. The circuit board as described in claim 6, wherein each tile is generally triangle-shaped and has convex corners and concave sides.

8. The circuit board as described in claim 6, wherein each tile is generally square-shaped and has wavy sides.

9. The circuit board as described in claim 6, wherein each tile is generally triangle-shaped and has wavy sides.

10. A ground plane of a circuit board, comprising

a plurality of tiles connected to each other in an array, each tile formed by ground traces, the tiles being arranged in such a manner that line segments of a signal trace on a signal plane of the circuit board mapped on the ground plane crosses any given ground traces of the ground plane at angles other than parallel, thereby minimizing interaction between the ground traces and the signal traces to reduce differences in impedances of the signal traces.

11. A circuit board, comprising:

a ground plane;

a media plane layered over the ground plane; and

a signal plane layered over the media plane, the signal plane having a plurality of signal traces arranged thereon, each of the signal traces comprising a plurality of line segments;

wherein

the ground plane comprising a plurality of tiles connected to each other in an array, each tile comprising a plurality of ground traces, the tiles being arranged in such a manner that each of the line segments of each signal trace mapped on the ground plane follow different paths from any one of the ground traces of the tiles, thereby minimizing interaction between the ground traces and the signal traces to reduce differences in impedances of the signal traces.

12. The circuit board as described in claim 11, wherein each of the tiles is a polygon delimited by a plurality of straight ground traces connected consecutively end-to-end.

13. The circuit board as described in claim 12, wherein the ground plane defines an X-axis along which one of the line segments of one of the signal traces is arranged, and a Y-axis being perpendicular to X-axis, a Y′

-axis being defined by some of the straight ground traces, the Y′

-axis being rotated a predetermined angle relative to the Y-axis.

14. The circuit board as described in claim 13, wherein the predetermined angle is 22.5 degree.

15. The circuit board as described in claim 11, wherein each of the tiles is formed by a plurality of curved ground traces connected consecutively end-to-end.