Configuration of Host LBA Interface With Flash Memory

• US 20080155177A1
• Filed: 12/26/2006
• Published: 06/26/2008
• Est. Priority Date: 12/26/2006
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Inventors: Sinclair, Alan W., Wright, Barry
• Granted Patent: US 8,209,461 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/04 Addressing variable-length words or parts of words
• CPC Class Codes: G06F 2212/7206 Reconfiguration of flash memory system

Abstract

Data files are assigned addresses within one or more logical blocks of a continuous logical address space interface (LBA interface) of a usual type of flash memory system with physical memory cell blocks. This assignment may be done by the host device which typically, but not necessarily, generates the data files. The number of logical blocks containing data of any one file is controlled in a manner that reduces the amount of fragmentation of file data within the physical memory blocks, thereby to maintain good memory performance. The host may configure the logical blocks of the address space in response to learning the physical characteristics of a memory to which it is connected.

Claims

1. A method of a host system transferring data of file objects through an interface adapted for connection with a non-volatile memory system of a type having blocks of memory cells that are erasable together prior to being reprogrammed, comprising:

maintaining at the interface a logical address space that is divided into logical blocks,

designating addresses of data within individual ones of the file objects within one or more of the logical blocks,

provide the capability within the host to receive through the interface information about the data storage capacity of individual blocks of memory cells of a memory system connected therewith, and

in response to receiving said information through the interface, being able to configure the sizes of the logical blocks of the logical address space to individually have the same data storage capacity as said information indicates to be possessed by the individual blocks of memory cells of the memory system.

2. The method of claim 1, additionally comprising:

providing the capability within the host to receive through the interface additional information about a division of the individual memory cell blocks into multiple pages and addresses of the first pages of the individual blocks to which data are written by the memory system, and

in response to receiving said additional information through the interface, being able to configure the logical blocks to individually have multiple pages with the same data storage capacity as the additional information indicates for the individual multiple pages of the memory cell blocks and map the lowest page addresses of the individual logical blocks into what the additional information indicates to be the first pages of the individual memory cell blocks.

3. A method of storing data of file objects in a non-volatile memory system having blocks of memory cells that are erasable together prior to being re-programmed with the data, wherein:

a logical address space is divided into logical blocks that individually have at least one characteristic corresponding to that of the individual memory cell blocks,

data of individual file objects are assigned addresses within one or more of the logical blocks,

addresses of the logical blocks are mapped within the memory system to addresses of memory cell blocks,

the memory system is removably connectable with the host device,

information of the at least one characteristic is stored in the memory system,

the host reads the characteristic information from one of the memory systems connected therewith, and

the host configures the address space logical blocks to correspond with the at least one characteristic.

4. The method of claim 3, wherein the host reads the characteristic information from one of the memory systems as part of an initialization of the one memory system connected with the host.

5. The method of claim 4, wherein the host reads the characteristic information in response to a command sent by the host to the one memory connected therewith.

6. The method of claim 3, wherein the at least one corresponding characteristic includes:

the data storage capacity of the individual logical blocks being the same as that of the individual memory cell blocks, and

the lowest addresses of the individual logical blocks being mapped into the lowest address of the individual memory cell blocks.

7. The method of claim 3, wherein the at least one corresponding characteristic includes:

the data storage capacity of the individual logical blocks being the same as that of the individual memory cell blocks,

the individual logical blocks being divided into multiple pages for writing data therein that have the same data storage capacity as individual multiple pages of the memory cell blocks, and

the lowest page addresses of the individual logical blocks being mapped into the first pages of the individual memory cell blocks.