System Using a Direct Data File System With a Continuous Logical Address Space Interface

• US 20080155228A1
• Filed: 12/26/2006
• Published: 06/26/2008
• Est. Priority Date: 12/26/2006
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk Corporation (Western Digital Corporation)
• Inventors: Sinclair, Alan W., Wright, Barry
• Granted Patent: US 7,739,444 B2
• Time in Patent Office: Days
• US Class Current: 711/209
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/2022 Flash memory
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 2212/7202 Allocation control and policies

Abstract

Data files are assigned addresses within one or more logical blocks of a continuous logical address space interface (LBA interface) of a usual type of flash memory system with physical memory cell blocks. This assignment may be done by the host device which typically, but not necessarily, generates the data files. The number of logical blocks containing data of any one file is controlled in a manner that reduces the amount of fragmentation of file data within the physical memory blocks, thereby to maintain good memory performance. The host may configure the logical blocks of the address space in response to learning the physical characteristics of a memory to which it is connected.

Claims

1. A computer system, comprising:

an interface in which data files are identified with addresses in a continuous logical address space that is divided into distinct blocks, and

a processor operably connected with the interface to cause data of individual files to be identified by addresses of one or more of the logical blocks selected to maintain a number of blocks partially containing data of any one of the files below a preset limit.

2. The system of claim 1, wherein the processor further operates to assign one of a plurality of designated states to the individual files depending upon the number of logical blocks that are partially filled with addresses of data of the file.

3. The system of claim 1, wherein the processor further operates to assign a state to each file having data addressed in the logical blocks, and to select one of the logical blocks in which data of a given file are to be addressed based on the state of the given file.

4. The system of claim 3, wherein the processor further operates to assign a state to each file having data addressed in the logical blocks that is based at least in part upon a number of logical blocks that are partially filled with addresses of data of the file.

5. The system of claim 4, wherein the processor further operates to assign a state to each file having data addressed in the logical blocks that is additionally based upon a number of logical blocks partially filled with addresses of data of the file that also contain unused capacity in which additional addresses may be designated.

6. The system of claim 4, wherein the processor further operates to assign a state to each file having data addressed in the logical blocks that is additionally based upon a number of blocks partially filled with addresses of data of the file that also contain addresses of data of one or more other files.

7. The system of claim 1, wherein the interface includes an external interface.