GATE STRUCTURE

• US 20080157231A1
• Filed: 03/11/2008
• Published: 07/03/2008
• Est. Priority Date: 11/08/2005
• Status: Abandoned Application

• Current Assignee: United Microelectronics Corporation
• Original Assignee: United Microelectronics Corporation
• Inventors: Chan, Shu-Yen, Huang, Kuo-Tai, Yen, Ying-Wei, Wang, Yun-Ren
• Application Number:
  US12/046,433
• Publication Number:
  US 20080157231A1
• Time in Patent Office: Days
• US Class Current: 257/411
• CPC Class Codes: H01L 21/28088 the final conductor layer next to the insulator being a composite, e.g. TiN
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 21/76822 Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
• CPC Class Codes: H01L 29/4966 the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material

Abstract

A method of fabricating a gate structure is provided. First, a sacrificial oxide layer is formed on a substrate. A nitridation treatment process is performed to redistribute the nitrogen atoms in the sacrificial layer and the substrate and produce a concentration profile such that the concentration of nitrogen progressively increases and then decreases toward the substrate with the maximum concentration of nitrogen in the sacrificial oxide layer. Next, the sacrificial oxide layer is removed. A re-oxidation process is performed to produce an interface layer on the surface of the substrate. A high K (dielectric constant) gate dielectric layer, a barrier layer and a metal layer are sequentially formed on the substrate. The metal layer, the barrier layer, the high K gate dielectric layer and the interface layer are defined to form a stacked gate structure.

Claims

1. A gate structure, comprising:

an interface layer disposed on a substrate;

a high dielectric constant (K) gate dielectric layer disposed on the interface layer;

a barrier layer disposed on the high-K gate dielectric layer; and

a metal layer disposed on the barrier layer.

2. The gate structure of claim 1, wherein the interface layer comprises a silicon oxynitride layer.

3. The gate structure of claim 1, wherein the interface layer has a nitrogen concentration profile that decreases progressively toward the substrate.

4. The gate structure of claim 1, wherein the interface layer has a thickness smaller than 7 Å

.

5. The gate structure of claim 1, wherein the nitrogen content in the interface layer is between 0.5˜

5% by weight.

6. The gate structure of claim 1, wherein the material constituting the high-K gate dielectric layer comprises tantalum oxide, zirconium oxide, hafnium oxide, aluminum oxide, hafnium silicide and titanium oxide.

7. The gate structure of claim 1, wherein the high-K gate dielectric layer has a thickness between 20 Å

˜

40 Å

.

8. The gate structure of claim 1, wherein the material constituting the metal layer comprises aluminum, platinum, tungsten, iridium, molybdenum, molybdenum nitride, nickel, nickel silicide, titanium, titanium nitride, titanium silicide, tantalum and tantalum nitride.

9. The gate structure of claim 1, wherein the material constituting the barrier layer comprises hafnium, titanium nitride, tantalum nitride and titanium nitride/titanium.