METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

• US 20080160741A1
• Filed: 11/01/2007
• Published: 07/03/2008
• Est. Priority Date: 12/29/2006
• Status: Abandoned Application

• Current Assignee: Dongbu HiTek Co., Ltd. (DB HiTek Co., Ltd.)
• Original Assignee: Dongbu HiTek Co., Ltd. (DB HiTek Co., Ltd.)
• Inventors: KANG, Byoung Ju
• Application Number:
  US11/933,925
• Publication Number:
  US 20080160741A1
• Time in Patent Office: Days
• US Class Current: 438/589
• CPC Class Codes: H01L 21/76897 Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step self-aligned silicidation on field effect transistors H01L29/665
• CPC Class Codes: H01L 29/66621 using etching to form a recess at the gate location etching of semiconductor bodies H01L21/302
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

A method of manufacturing a semiconductor device comprising forming a plurality of trench gate electrodes in a semiconductor substrate which protrude from the semiconductor substrate by a predetermined height; forming a polycrystal silicon film on the surface of the substrate; performing an anisotropic etching process on the polycrystal silicon film so as to expose the upper surfaces of the trench gate electrodes and to form spacers on each side of the trench gate electrodes; forming an insulating film on the substrate; forming a plurality of first photoresist patterns; etching the insulating film using the first photoresist patterns in order to form a plurality of insulating film patterns with spaces being formed between the plurality of insulating film patterns; and forming metal film patterns in the spaces between the insulating film patterns in order to form a series of contacts which correspond to the trench gate electrodes.

Claims

1. A method of manufacturing a semiconductor device, the method comprising:

forming a plurality of trench gate electrodes in a semiconductor substrate, the trench gate electrodes protruding from the semiconductor substrate at a predetermined height;

forming a polycrystal silicon film on the entire surface of the substrate wherein the trench gate electrodes are formed;

performing an anisotropic etching process on the polycrystal silicon film so as to expose an upper surface of the trench gate electrodes, in order to form spacers on each sides of the trench gate electrodes;

forming an insulating film on the surface of the substrate wherein the trench gate electrodes and spacers are formed;

forming a plurality of photoresist patterns on the insulating film;

etching the insulating film using the photoresist patterns so as to form a plurality of insulating film patterns; and

forming metal film patterns in the area between the insulating film patterns so as to form a series of contacts capable of electrically connecting to the trench gate electrodes.

2. The method according to claim 1, wherein the forming the metal film patterns comprises:

filling the spaces between the plurality of insulating film patterns with a metal film;

forming a second series of photoresist patterns on the metal film; and

etching the metal film using the second photoresist patterns to form the metal film patterns so as to form the series of contacts capable of electrically connecting to the trench gate electrodes.

3. The method according to claim 1, wherein forming the spacers comprises performing an anisotropic etching process including a blanket etching process.

4. The method according to claim 1, wherein the insulating film patterns are formed using any material selected from the group of a thermal oxide material, a boro-phospho silicate glass (BPSG) material, and a low-k insulating material.

5. The method according to claim 1, wherein the trench gate electrodes protrude from the substrate is at a predetermined height of between 800 and 1200 Å

.

6. The method according to claim 1, wherein the height of the spacers is equal to the predetermined height of the trench gate electrodes protruding from the substrate, and is between 800 and 1200 Å

.

10. The method according to claim 1, wherein the trench gate electrodes protrude from the substrate is at a predetermined height of between 800 and 1200 Å

.

7. A method of manufacturing a semiconductor device, the method comprising:

forming a plurality of trench gate electrodes in a semiconductor substrate, the trench gate electrodes protruding from the semiconductor substrate at a predetermined height;

forming a polycrystal silicon film on the entire surface of the substrate wherein the trench gate electrodes are formed;

performing an anisotropic etching process on the polycrystal silicon film so as to expose an upper surface of the trench gate electrodes, in order to form spacers on each sides of the trench gate electrodes which protrude from the semiconductor substrate at a predetermined height equal to the predetermined height of the trench gate electrodes;

forming an insulating film on the surface of the substrate wherein the trench gate electrodes and spacers are formed;

forming a plurality of photoresist patterns on the insulating film;

etching the insulating film using the photoresist patterns so as to form a plurality of insulating film patterns with spaces between the insulating patterns;

filling the spaces between the plurality of insulating film patterns with a metal film;

forming a second series of photoresist patterns on the metal film; and

etching the metal film using the second photoresist patterns to form the metal film patterns so as to form the series of contacts capable of electrically connecting to the trench gate electrodes.

8. The method according to claim 7, wherein forming the spacers comprises performing an anisotropic etching process including a blanket etching process.

9. The method according to claim 7, wherein the insulating film patterns are formed using any material selected from the group of a thermal oxide material, a boro-phospho silicate glass (BPSG) material, and a low-k insulating material.