Memory access without internal microprocessor intervention
First Claim
1. A computer system, comprising:
- a sensor panel;
a first device configured to receive and process sense signals from the sensor panel, the first device including a first processor, a first memory and a first communication interface; and
a second device, external to the first device, including a second processor, a second memory and a second communication interface, wherein the first and second devices communicate via the first and second communication interfaces implementing a predetermined communication protocol that enables an access operation to be performed on the first or second memory without intervention by the first processor.
3 Assignments
0 Petitions
Accused Products
Abstract
A method and system for accessing a computer system memory without processor intervention is disclosed. In one embodiment, the method includes initiating a predetermined communication protocol between a first device and a second device, the first device including a first processor, a first memory and a first communication interface, the second device including a second processor, a second memory and a second communication interface. The predetermined communication protocol enables an access operation to be performed on the first or second memory without intervention by the first or second processor. In one embodiment, the predetermined communication protocol utilizes a plurality of predefined packet types which are identified by a packet header decoder.
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Citations
38 Claims
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1. A computer system, comprising:
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a sensor panel; a first device configured to receive and process sense signals from the sensor panel, the first device including a first processor, a first memory and a first communication interface; and a second device, external to the first device, including a second processor, a second memory and a second communication interface, wherein the first and second devices communicate via the first and second communication interfaces implementing a predetermined communication protocol that enables an access operation to be performed on the first or second memory without intervention by the first processor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A computer system, comprising:
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a first device including a first processor, a first memory and a first communication interface; a second device, external to the first device, including a second processor, a second memory and a second communication interface, wherein the first and second devices communicate via the first and second communication interfaces implementing a predetermined packet-based communication protocol that utilizes a plurality of packet types each having a predefined header format; a packet header decoder for identifying a packet type corresponding to a packet transmitted between the first and second communication interfaces; and a logic device contained within the first communication interface configured to be responsive to the packet type and execute an access operation to be performed on the first or second memory without intervention by the first processor. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21)
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22. A method of accessing a computer system memory, comprising:
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initiating a predetermined communication protocol between a first device and a second device, the first device including a first processor, a first memory and a first communication interface, the second device including a second processor, a second memory and a second communication interface, and wherein the predetermined communication protocol enables an access operation to be performed on the first or second memory without intervention by the first or second processor. - View Dependent Claims (23, 24, 25, 26, 27, 28, 29)
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30. A computer system, comprising:
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means for initiating a predetermined communication protocol between a first device and a second device, the first device including a first processor, a first memory and a first communication interface, the second device including a second processor, a second memory and a second communication interface, and wherein the predetermined communication protocol utilizes a plurality of packet types each having a predefined header format and enables an access operation to be performed on the first or second memory without intervention by the first or second processor. - View Dependent Claims (31, 32, 33, 34, 35, 36)
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37. A mobile telephone, comprising:
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a sensor panel; a first device configured to receive and process sense signals from the sensor panel, the first device including a first processor, a first memory and a first communication interface; and a second device, external to the first device, including a second processor, a second memory and a second communication interface, wherein the first and second devices communicate via the first and second communication interfaces implementing a predetermined communication protocol that enables an access operation to be performed on the first or second memory without intervention by the first processor.
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38. A digital audio player, comprising:
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a sensor panel; a first device configured to receive and process sense signals from the sensor panel, the first device including a first processor, a first memory and a first communication interface; and a second device, external to the first device, including a second processor, a second memory and a second communication interface, wherein the first and second devices communicate via the first and second communication interfaces implementing a predetermined communication protocol that enables an access operation to be performed on the first or second memory without intervention by the first processor.
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Specification