SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAME

• US 20080164517A1
• Filed: 01/02/2008
• Published: 07/10/2008
• Est. Priority Date: 01/09/2007
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Kawano, Takahiro, OHTA, Tsuyoshi
• Granted Patent: US 7,910,440 B2
• Time in Patent Office: Days
• US Class Current: 257/330
• CPC Class Codes: H01L 29/0661 specially adapted for altering the breakdown voltage by removing semiconductor material at, or in the neighbourhood of, a reverse biased junction, e.g. by bevelling, moat etching, depletion etching
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A semiconductor device according to the present invention includes: a first trench that is formed in a semiconductor substrate; a gate oxide film that is formed on a surface of the first trench; and a trench gate electrode that is formed so as to bury the first trench via the gate oxide film. The semiconductor device also includes: a second trench that is formed in the semiconductor substrate with a width wider than the width of the first trench; and a terminal-embedded insulation layer that is formed so as to bury the second trench. The semiconductor device further includes: a third trench that is formed in the semiconductor substrate with a width wider than the width of the second trench; and a trench contact electrode that is formed so as to bury the third trench.

Claims

1. A semiconductor device comprising:

a semiconductor substrate;

a first trench formed in the semiconductor substrate;

a gate oxide film formed on a surface of the first trench;

a trench gate electrode formed so as to bury the first trench via the gate oxide film;

a second trench formed in the semiconductor substrate with a width wider than the width of the first trench;

a terminal-embedded insulation layer formed so as to bury the second trench;

a third trench formed in the semiconductor substrate with a width wider than the width of the second trench; and

a trench contact electrode formed so as to bury the third trench.

2. The semiconductor device according to claim 1, wherein

the width of the second trench is at least 1.2 times larger than the width of the first trench, and the width of the third trench is at least 1.2 times larger than the width of the second trench.

3. The semiconductor device according to claim 1, wherein

the width of the second trench is twice or less as large as the width of the first trench, and the width of the third trench is twice or less as large as the width of the second trench.

4. The semiconductor device according to claim 1, wherein

the width of the first trench is 0.4 μ

m, the width of the second trench is 0.5 μ

m, and the width of the third trench is 0.7 μ

m.

5. The semiconductor device according to claim 1, wherein

a different material is embedded in each of the first trench, the second trench, and the third trench, respectively.

6. A method for making a semiconductor device comprising:

forming a narrower trench and a wider trench with different widths on the same surface of a semiconductor substrate;

burying the inside of the narrower trench with film material through deposition of the film on a surface in the semiconductor substrate where the narrower trench and the wider trench are formed, whereas forming a film with a certain film thickness in the wider trench; and

performing etching in the semiconductor substrate for leaving some portions of the film in the narrower trench and for removing film material in the wider trench.

7. The method for making the semiconductor device according to claim 6, wherein

the wider trench is formed in such a way that the width of the wider trench is at least 1.2 times larger than the width of the narrower trench.

8. The method for making the semiconductor device according to claim 6, wherein

the wider trench is formed in such a way that the width of the wider trench is twice or less as large as the width of the narrower trench.

9. The method for making the semiconductor device according to claim 6, wherein

the etching is isotropic etching.

10. The method for making the semiconductor device according to claim 6, wherein

the etching is wet etching or chemical dry etching.

11. A method for making the semiconductor device comprising:

concurrently forming a first trench, a second trench wider than the first trench, and a third trench wider than the second trench on the same surface of a semiconductor layer;

forming an oxide film on a surface of the semiconductor layer;

filling up the first trench with conductive material without filling up the second trench and the third trench therewith, through deposition of the conductive material on the semiconductor layer where the oxide film is formed, the conductive material corresponding to a gate electrode;

removing by etching the conductive material deposited in the second trench and the third trench with the conductive material being left in the first trench;

filling up the second trench with insulating material without filling up the third trench therewith, through deposition of the insulating material on the semiconductor layer where the oxide film is formed, the insulating material corresponding to an embedded insulation layer;

removing by etching the insulating material and the oxide film deposited in the third trench with the insulating material being left in the second trench; and

covering at least an inner surface of the third trench with metallic material, through deposition of the metallic material on the semiconductor layer, the metallic material corresponding to an electrode film.

12. The method for making the semiconductor device according to claim 11, wherein

the trench-formed density in a region where the second trench is formed is lower than the trench-formed density in each region where the first trench and the third trench are formed respectively, and the second trench is filled up with the insulating material through deposition of the insulating material with CVD.

13. The method for making the semiconductor device according to claim 11, wherein

the second trench is formed in such a way that the width of the second trench is at least 1.2 times larger than the width of the first trench, and the third trench is formed in such a way that the width of the third trench is at least 1.2 times larger than the width of the second trench.

14. The method for making the semiconductor device according to claim 11, wherein

the second trench is formed in such a way that the width of the second trench is twice or less as large as the width of the first trench, and the third trench is formed in such a way that the width of the third trench is twice or less as large as the width of the second trench.

15. The method for making the semiconductor device according to claim 11, wherein

the etching is isotropic etching.

16. The method for making the semiconductor device according to claim 11, wherein

the etching is wet etching or chemical dry etching.