SEMICONDUCTOR DEVICE
First Claim
1. A semiconductor device comprising:
- a semiconductor layer of a first conductivity type having a first surface and a second surface;
a source region disposed on the first surface;
a gate region disposed on the first surface adjacent the source region;
a drain region disposed on the first surface; and
at least a pair of charge control trenches disposed between the gate region and the drain region, wherein each of the at least a pair of charge control trenches is characterized by a width and includes a first dielectric material disposed therein and a second material disposed internal to the first dielectric material and wherein a concentration of doping impurities present in the semiconductor layer of the first conductivity type and a distance between the at least a pair of charge control trenches define an electrical characteristic of the semiconductor device that is independent of the width of each of the at least a pair of charge control trenches.
2 Assignments
0 Petitions
Accused Products
Abstract
A semiconductor device includes a semiconductor layer of a first conductivity type having a first surface and a second surface, a source region disposed on the first surface, a gate region disposed on the first surface adjacent the source region, and a drain region disposed on the first surface. The semiconductor device also includes a pair of charge control trenches disposed between the gate region and the drain region. Each of the pair of charge control trenches is characterized by a width and includes a first dielectric material disposed therein and a second material disposed internal to the first dielectric material. Additionally, a concentration of doping impurities present in the semiconductor layer of the first conductivity type and a distance between the pair of charge control trenches define an electrical characteristic of the semiconductor device that is independent of the width of each of the pair of charge control trenches.
75 Citations
31 Claims
-
1. A semiconductor device comprising:
-
a semiconductor layer of a first conductivity type having a first surface and a second surface; a source region disposed on the first surface; a gate region disposed on the first surface adjacent the source region; a drain region disposed on the first surface; and at least a pair of charge control trenches disposed between the gate region and the drain region, wherein each of the at least a pair of charge control trenches is characterized by a width and includes a first dielectric material disposed therein and a second material disposed internal to the first dielectric material and wherein a concentration of doping impurities present in the semiconductor layer of the first conductivity type and a distance between the at least a pair of charge control trenches define an electrical characteristic of the semiconductor device that is independent of the width of each of the at least a pair of charge control trenches. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
-
-
10. A semiconductor device comprising:
-
a semiconductor layer of a first conductivity type having a first surface and a second surface; a source region disposed on the first surface; a gate region disposed on the first surface adjacent the source region; a drain region disposed on the first surface; and a charge control trench disposed between the gate region and the drain region, wherein the charge control trench comprises a first dielectric material disposed therein, the first dielectric material including an intentionally introduced charge. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
-
-
19. A semiconductor device comprising a semiconductor layer of a first conductivity type, the semiconductor layer of the first conductivity type having formed thereon:
-
a first semiconductor region of a second conductivity type, wherein the first semiconductor region is characterized by a first thickness; a first trench having a predetermined depth and extending into the first semiconductor region, thereby defining a first interfacial region disposed between the first semiconductor region and the first trench, wherein the first trench comprises; a first dielectric material disposed in a proximal portion of the first trench and distal portion of the first trench, wherein an intentionally introduced charge is present in at least one of the first dielectric material disposed in the proximal portion of the first trench or the first interfacial region; and a first gate material disposed interior to the first dielectric material in the proximal portion of the first trench; and a second semiconductor region of the first conductivity type, wherein the second semiconductor region is characterized by a second thickness; a second trench having a second predetermined depth and extending into the second semiconductor region, thereby defining a second interfacial region disposed between the second semiconductor region and the second trench, wherein the second trench comprises; a second dielectric material disposed in a proximal portion of the second trench and distal portion of the second trench, wherein an intentionally introduced charge is provided in at least one of the second dielectric material disposed in the proximal portion of the second trench or the second interfacial region; and a second gate material disposed interior to the second dielectric material in the proximal portion of the second trench. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31)
-
Specification