Method and Apparatus for Providing Thermal Management on High-Power Integrated Circuit Devices

• US 20080164603A1
• Filed: 01/08/2007
• Published: 07/10/2008
• Est. Priority Date: 01/08/2007
• Status: Active Grant

• Current Assignee: BAE Systems Information and Electronic Systems Integration Incorporated (BAE Systems Plc)
• Original Assignee: BAE Systems Information and Electronic Systems Integration Incorporated (BAE Systems Plc)
• Inventors: Sturcken, Keith K., McIntyre, Thomas J.
• Granted Patent: US 7,491,577 B2
• Time in Patent Office: Days
• US Class Current: 257/713
• CPC Class Codes: H01L 21/4871 Bases, plates or heatsinks
• CPC Class Codes: H01L 2224/0554 External layer
• CPC Class Codes: H01L 2224/0555 Shape
• CPC Class Codes: H01L 2224/0556 Disposition
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/05684 Tungsten [W] as principal constituent
• CPC Class Codes: H01L 2224/06519 including bonding areas providing primarily thermal dissipation
• CPC Class Codes: H01L 2224/13 of an individual bump connector
• CPC Class Codes: H01L 2224/13006 Bump connector larger than the underlying bonding area, e.g. than the under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/13023 the whole bump connector protruding from the surface
• CPC Class Codes: H01L 2224/13025 the bump connector being disposed on a via connection of the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/131 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/14519 including bump connectors providing primarily thermal dissipation
• CPC Class Codes: H01L 23/3677 Wire-like or pin-like cooling fins or heat sinks
• CPC Class Codes: H01L 23/3732 Diamonds
• CPC Class Codes: H01L 23/427 Cooling by change of state, e.g. use of heat pipes by liquefied gas H01L23/445
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/06 of a plurality of bonding areas
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/014 : Solder alloys

Abstract

An apparatus for providing thermal management on high-power integrated circuit devices is disclosed. Initially, contacts to active devices are formed. Phase change materials are then applied over potential hot spots that can be formed by the active devices. A layer of high-thermally conductive materials is deposited over the phase change materials. The layer of high-thermally conductive materials and the phase change materials are subsequently etched according to a pattern. A layer of passivation conductive vias is subsequently applied to the phase change materials to complete the formation of phase change heatsinks.

Claims

1. method for manufacturing a phase change heatsink within an integrated circuit device method comprising:

applying a layer of phase change materials over a potential hot spot that can formed by an active component within said integrated circuit device;

depositing a layer of high thermal conductivity materials to form a heat spreader over said layer of phase change materials; and

providing a heat conducting via to direct heat away from said layer of high thermal conductivity materials.

2. The method of claim 1, wherein said method further includes etching said layer of high thermal conductivity materials and said phase change materials.

3. The method of claim 1, wherein said method further includes

forming said active component on a bulk silicon during a Front End of the Line;

and

forming said layers of phase change materials, said layer of high thermal conductivity materials and said heat conducting via during a Back End of the Line.

4. The method of claim 1, wherein said method further includes applying a layer of passivation and wiring to chip terminations.

5. The method of claim 1, wherein said phase change materials are chalcogenide.

6. A heatsink within an integrated circuit device, said heatsink comprising:

a layer of phase change materials over an active component within said integrated circuit device;

a heat spreader formed by a layer of high thermal conductivity materials over said layer of phase change materials; and

a heat conducting via for directing heat away from said heat spreader.

7. The heatsink of claim 6, wherein said heatsink further includes said active component formed on a bulk silicon during a Front End of the Line;

and

said layers of phase change materials, said heat spreader and said heat conducting via formed on top of said bulk silicon during a Back End of the Line.

8. The heatsink of claim 6, wherein said phase change materials are chalcogenide.

9. A heatsink within an integrated circuit device, said heatsink comprising:

an interconnect metal for directing heat away from an active component within said integrated circuit device;

a layer of phase change materials; and

a heat conducting via and a heat transfer trace for directing heat from said interconnect metal to said layer of phase change materials.

10. The heatsink of claim 9, wherein said heatsink further includes said active component formed on a bulk silicon during a Front End of the Line;

and

said layers of phase change materials formed within a passivation layer located on top of said bulk silicon during a Back End of the Line.

11. The heatsink of claim 9, wherein said phase change materials are chalcogenide.