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System and method for testing semiconductor integrated circuit in parallel

  • US 20080164894A1
  • Filed: 01/03/2008
  • Published: 07/10/2008
  • Est. Priority Date: 01/04/2007
  • Status: Abandoned Application
First Claim
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1. A system for testing semiconductor devices in parallel, comprising:

  • a probe chuck for loading a plurality of different types of semiconductor DUTs (device under test);

    a test head for providing a plurality of circuit sites to independently and simultaneously test the different types of semiconductor DUTs; and

    a test controller for controlling the test head and the probe chuck.

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