Storage node of a resistive random access memory device and method of manufacturing the same

• US 20080169459A1
• Filed: 12/20/2007
• Published: 07/17/2008
• Est. Priority Date: 01/12/2007
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Choi, Sang-jun, Lee, Chang-soo, Lee, Jung-hyun, Bae, Hyung-jin
• Granted Patent: US 8,362,455 B2
• Time in Patent Office: Days
• US Class Current: 257/4
• CPC Class Codes: H10B 63/30 comprising selection components having three or more electrodes, e.g. transistors
• CPC Class Codes: H10N 70/026 by physical vapor deposition, e.g. sputtering
• CPC Class Codes: H10N 70/20 Multistable switching devices, e.g. memristors
• CPC Class Codes: H10N 70/826 adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
• CPC Class Codes: H10N 70/8833 Binary metal oxides, e.g. TaOx

Abstract

Provided are a resistive random access memory device and a method of manufacturing the same. The resistive random access memory device includes a switching device and a storage node connected to the switching device, and the storage node includes a first electrode and a second electrode and a resistance change layer formed of Cu_2-XO between the first electrode and the second electrode.

Claims

1. A storage node comprising:

a first electrode and a second electrode; and

a resistance change layer formed of Cu_2-XO between the first electrode and the second electrode.

2. The storage node of claim 1, wherein X in the Cu_2-XO is in a range of 0≦

X≦

0.5.

3. The storage node of claim 1, wherein at least one of the first electrode and the second electrode is one of a TiN layer, a TaN layer, a Pt layer, an Al layer and a Ru layer.

4. The storage node of claim 1, wherein a crystal orientation of the resistance change layer is the same as a crystal orientation of at least one of the first electrode and the second electrode.

5. A resistive random access memory device comprising:

the storage node of claim 1; and

a switching device connected to the storage node.

6. The resistive random access memory device of claim 5, wherein X in the Cu_2-XO is in a range of 0≦

X≦

0.5 .

7. The resistive random access memory device of claim 5, wherein at least one of the first electrode and the second electrode is one of a TiN layer, a TaN layer, a Pt layer, an Al layer and a Ru layer.

8. The resistive random access memory device of claim 5, wherein a crystal orientation of the resistance change layer is the same as a crystal orientation of at least one of the first electrode and the second electrode.

9. A method of manufacturing a storage node, the method comprising:

forming a first electrode;

forming a Cu_2-XO layer on the first electrode; and

forming a second electrode on the Cu_2-XO layer.

10. The method of claim 9, wherein the Cu_2-XO layer is formed by a non-reactive sputtering method.

11. The method of claim 9, wherein the Cu_2-XO layer is formed by a radio frequency (RF) sputtering method.

12. The method of claim 11, further comprising providing Cu₂O as a target material in the RF sputtering method.

13. The method of claim 11, further comprising providing Ar gas or a mixed gas of Ar gas and N₂ gas in the RF sputtering method.

14. The method of claim 9, wherein X of the Cu_2-XO layer is in a range of 0≦

X≦

0.5.

15. The method of claim 9, wherein forming the storage node includes forming at least one of the first electrode and the second electrode of any one selected from TiN, TaN, Pt, Al and Ru.

16. The method of claim 9, wherein forming the storage node includes forming at least one of the first electrode and the second electrode by chemical vapor deposition (CVD) or physical vapor deposition (PVD).

17. The method of claim 11, further comprising providing a pressure of 0.1 mtorr - 100 mtorr in a pressure chamber.

18. A method of manufacturing a resistive random access memory device comprising:

forming the storage node by the method of claim 9; and

forming a switching device connected to the storage node.

19. The method of claim 18, wherein the Cu_2-XO layer is formed by a non-reactive sputtering method.

20. The method of claim 18, wherein the Cu_2-XO layer is formed by a radio frequency (RF) sputtering method.

21. The method of claim 18, wherein X of the Cu_2-XO layer is in a range of 0≦

X≦

0.5.

22. The method of claim 18, wherein forming the storage node includes forming at least one of the first electrode and the second electrode of any one selected from TiN, TaN, Pt, Al and Ru.