Direct digital synthesis of transmitter gain and bias control curves

• US 20080169951A1
• Filed: 01/17/2007
• Published: 07/17/2008
• Est. Priority Date: 01/17/2007
• Status: Abandoned Application

• Current Assignee: STMicroelectronics Incorporated (STMicroelectronics NV)
• Original Assignee: STMicroelectronics Incorporated (STMicroelectronics NV)
• Inventors: Huan, Lun Bin, Krivokapic, Ivan
• Application Number:
  US11/654,330
• Publication Number:
  US 20080169951A1
• Time in Patent Office: Days
• US Class Current: 341/139
• CPC Class Codes: H03G 3/3036 in high-frequency amplifiers or in frequency-changers H03G3/3052, H03G3/32, H03G3/34 take precedence
• CPC Class Codes: H03G 3/3042 in modulators, frequency-changers, transmitters or power amplifiers transmission power control in bidirectional transmission systems H04W52/04

Abstract

A transmitter includes a plurality of devices which processes a transmit signal. Examples of such devices include a variable gain amplifier, a power amplifier and/or a modulator. Some other these devices are gain controllable. Some of these devices are bias controllable. Each controllable device receives at least one analog control signal (gain/bias) which sets operation of the controllable device. A logic circuit receives a specification of the analog control signal and generating a digital control signal based thereon. A digital-to-analog converter circuit converts the digital control signal to the analog control signal for application to the controllable device. The digital control signal generated by the logic circuit comprises a plurality of connected linear segments (a digital piecewise approximation) which approximate the specification of the analog (gain/bias) control signal, and the generated analog control signal is comprised of a corresponding plurality of connected analog linear segments (an analog piecewise approximation).

Claims

1. A transmitter, comprising:

a gain controllable device which processes a transmit signal, the gain controllable device receiving an analog gain control signal which sets a gain of the gain controllable device;

a logic circuit receiving a specification of the analog gain control signal and generating a digital gain control signal based thereon; and

a digital-to-analog converter circuit that converts the digital gain control signal to the analog gain control signal for application to the gain controllable device.

2. The transmitter of claim 1 wherein the gain controllable device is a variable gain amplifier.

3. The transmitter of claim 1 wherein the gain controllable device is a modulator.

4. The transmitter of claim 1 wherein the digital gain control signal generated by the logic circuit comprises a plurality of linear segments which approximate the specification of the analog gain control signal, and the generated analog gain control signal is comprised of a corresponding plurality of analog linear segments.

5. The transmitter of claim 1 wherein the specification of the analog gain control signal is a pulse density modulation (PDM) specification of the analog gain control signal.

6. The transmitter of claim 5 wherein the logic circuit comprises a PDM decoder operating to decode the PDM specification and generate PDM digital data describing the analog gain control signal.

7. The transmitter of claim 6 wherein the logic circuit further comprises a linear segment approximator which receives the PDM digital data describing the analog gain control signal and generates parameters digitally specifying a plurality of connected line segments which approximate the specification of the analog gain control signal.

8. The transmitter of claim 7 wherein the logic circuit further comprises an arithmetic logic unit which arithmetically processes the parameters digitally specifying a plurality of connected linear segments to generate digital data describing the plurality of connected linear segments, wherein the digital-to-analog converter circuit converts the generated digital data to generate the analog gain control signal which is comprised of a corresponding plurality of connected analog linear segments.

9. The transmitter of claim 1 wherein the logic circuit generates a digital piecewise approximation of the analog gain control signal as the digital gain control signal and the digital-to-analog converter circuit converts that digital piecewise approximation into the analog gain control signal which is also a piecewise approximation for application to the gain controllable device.

10. A transmitter, comprising:

a device which processes a transmit signal, the device having a controllable bias and receiving an analog bias control signal which sets a bias of the device;

a logic circuit receiving a specification of the analog bias control signal and generating a digital bias control signal based thereon; and

a digital-to-analog converter circuit that converts the digital bias control signal to the analog bias control signal for application to the device.

11. The transmitter of claim 10 wherein the device whose bias is controllable is a variable gain amplifier.

12. The transmitter of claim 10 wherein the device whose bias is controllable is a power amplifier.

13. The transmitter of claim 10 wherein the device whose bias is controllable is a modulator.

14. The transmitter of claim 10 wherein the digital bias control signal generated by the logic circuit comprises a plurality of linear segments which approximate the specification of the analog bias control signal, and the generated analog bias control signal is comprised of a corresponding plurality of analog linear segments.

15. The transmitter of claim 10 wherein the specification of the analog bias control signal is a pulse density modulation (PDM) specification of the analog bias control signal.

16. The transmitter of claim 15 wherein the logic circuit comprises a PDM decoder operating to decode the PDM specification and generate PDM digital data describing the analog bias control signal.

17. The transmitter of claim 16 wherein the logic circuit further comprises a linear segment approximator which receives the PDM digital data describing the analog bias control signal and generates parameters digitally specifying a plurality of connected line segments which approximate the specification of the analog bias control signal.

18. The transmitter of claim 17 wherein the logic circuit further comprises an arithmetic logic unit which arithmetically processes the parameters digitally specifying a plurality of connected linear segments to generate digital data describing the plurality of connected linear segments, wherein the digital-to-analog converter circuit converts the generated digital data to generate the analog bias control signal which is comprised of a corresponding plurality of connected analog linear segments.

19. The transmitter of claim 10 wherein the logic circuit generates a digital piecewise approximation of the analog bias control signal as the digital bias control signal and the digital-to-analog converter circuit converts that digital piecewise approximation into the analog bias control signal which is also a piecewise approximation for application to the device.

20. A transmitter, comprising:

a modulator for modulating a digital baseband signal for RF transmission, the modulator having a controllable bias and receiving an analog bias control signal which sets a bias of the modulator;

an amplifier for amplifying the RF modulated digital baseband signal, the amplifier having a controllable gain and receiving an analog gain control signal which sets a gain of the amplifier;

a logic circuit receiving a specification of the analog bias control signal and the analog gain control signal, the logic circuit generating a digital bias control signal and a digital gain control signal based thereon;

a first digital-to-analog converter circuit that converts the digital bias control signal to the analog bias control signal for application to the modulator; and

a second digital-to-analog converter circuit that converts the digital gain control signal to the analog gain control signal for application to the amplifier.

21. The transmitter of claim 20 wherein the logic circuit generates a digital piecewise approximation of the analog gain/bias control signal as the digital gain/bias control signal and the digital-to-analog converter circuit converts that digital piecewise approximation into the analog gain/bias control signal which is also a piecewise approximation.

22. The transmitter of claim 20 wherein the digital gain/bias control signal generated by the logic circuit comprises a plurality of linear segments which approximate the specification of the analog gain/bias control signal, and the generated analog gain/bias control signal is comprised of a corresponding plurality of analog linear segments.

23. The transmitter of claim 20 wherein the logic circuit comprises a linear segment approximator which receives digital data describing the analog gain/bias control signal and generates parameters digitally specifying a plurality of connected line segments which approximate the specification of the analog gain/bias control signal.

24. The transmitter of claim 23 wherein the logic circuit further comprises an arithmetic logic unit which arithmetically processes the parameters digitally specifying a plurality of connected linear segments to generate digital data describing the plurality of connected linear segments, wherein the digital-to-analog converter circuit converts the generated digital data to generate the analog gain/bias control signal which is comprised of a corresponding plurality of connected analog linear segments.