Word line drivers in non-volatile memory device and method having a shared power bank and processor-based systems using same
First Claim
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1. A non-volatile memory device comprising:
- an array of non-volatile memory cells arranged in rows, each row of memory cells coupled to a respective word line;
a voltage selection circuit operable to selectively supply one of at least two voltages to an output node depending upon the nature of an operation being performed by the non-volatile memory device; and
a plurality of word line control circuits coupled to the output node of the voltage selection circuit, each of the word line control circuits coupled to a respective word line in the array of non-volatile memory cells and being operable to selectively couple the voltage supplied to the output node to the respective word line.
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Abstract
A word line driver system is described that utilizes a voltage selection circuit to supply one of several voltages to an output node coupled to a plurality of word line control circuits. Each word line control circuit is coupled to a respective word line in an array of non-volatile memory cells. The voltage selection circuit may include selectable low pass filters for filtering the supplied voltage supplied to the word lines in the array of memory cells without significantly increasing the overall die-size of the device.
37 Citations
43 Claims
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1. A non-volatile memory device comprising:
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an array of non-volatile memory cells arranged in rows, each row of memory cells coupled to a respective word line; a voltage selection circuit operable to selectively supply one of at least two voltages to an output node depending upon the nature of an operation being performed by the non-volatile memory device; and a plurality of word line control circuits coupled to the output node of the voltage selection circuit, each of the word line control circuits coupled to a respective word line in the array of non-volatile memory cells and being operable to selectively couple the voltage supplied to the output node to the respective word line. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A word line driver system coupled to an array of non-volatile memory cells arranged in rows, each row of cells coupled by a word line, the word line driver system comprising:
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a voltage driver circuit operable to select and drive one of at least two voltages; a low pass filter circuit coupled to the voltage driver circuit and having an output node, the low pass filter circuit operable to receive the selected voltage from the voltage driver circuit and to generate a filtered voltage at the output node; and a plurality of word line control circuits coupled to the output node of the low pass filter circuit, each of the word line control circuits coupled to a respective word line in the array of the non-volatile memory cells and being operable to selectively couple the filtered voltage at the output node to the respective word line. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A processor-based system comprising:
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a processor operable to process data and to provide memory commands and addresses; an input device coupled to the processor; an output device coupled to the processor; and a non-volatile memory device comprising; an array of non-volatile memory cells arranged in rows, each row of memory cells coupled by a word line; a voltage selection circuit operable to selectively supply one of at least two voltages to an output node depending upon the nature of the memory commands provided by the processor; and a plurality of word line control circuits coupled to the output node of the voltage selection circuit, each of the word line control circuits coupled to a respective word line in the array of non-volatile memory cells and being operable to selectively couple the voltage supplied to the output node to the respective word line. - View Dependent Claims (18, 19, 20, 21, 22, 23)
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24. A processor-based system comprising:
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a processor operable to process data and to provide memory commands and addresses; an input device coupled to the processor; an output device coupled to the processor; and a non-volatile memory device having a word line driver system coupled to an array of non-volatile memory cells arranged in rows, each row of cells coupled by a word line, the word line driver system comprising; a voltage driver circuit operable to select and drive one of at least two voltages; a low pass filter circuit coupled to the voltage driver circuit and having an output node, the low pass filter circuit operable to receive the selected voltage from the voltage driver circuit and to generate a filtered voltage at the output node; and a plurality of word line control circuits coupled to the output node of the low pass filter circuit, each of the word line control circuits coupled to a respective word line in the array of the non-volatile memory cells and being operable to selectively couple the filtered voltage at the output node to the respective word line. - View Dependent Claims (25, 26, 27, 28, 29, 30, 31)
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32. A method of applying a voltage on word lines of an array of non-volatile memory cells in a non-volatile memory device comprising:
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selecting one of at least two voltages to provide as an output signal depending upon the nature of an operation being performed by the non-volatile memory device; and selectively applying the output signal to the respective word line of a memory cell in the non-volatile memory device. - View Dependent Claims (33, 34, 35, 36, 37)
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38. A method of driving a voltage signal on each word line of an array of non-volatile memory cells in a non-volatile memory comprising:
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filtering a voltage to generate a filtered output voltage signal; and selectively applying the filtered output voltage signal to one of a plurality of word lines in the non-volatile memory device. - View Dependent Claims (39, 40, 41, 42, 43)
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Specification