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MULTI-PATH ACCESSIBLE SEMICONDUCTOR MEMORY DEVICE HAVING MAILBOX AREAS AND MAILBOX ACCESS CONTROL METHOD THEREOF

  • US 20080170460A1
  • Filed: 08/23/2007
  • Published: 07/17/2008
  • Est. Priority Date: 01/17/2007
  • Status: Active Grant
First Claim
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1. A semiconductor memory device having N number of ports, the device comprising;

  • at least one shared memory area provided in a memory cell array, operationally connected to the N number of ports, and accessible through a plurality of data input/output lines to form a data access path between the at least one shared memory area and one port, having an access right to the at least one shared memory area, among the N number of ports; and

    N number of mailbox areas for message communication provided in one-to-one correspondence with the N number of ports and accessible through the plurality of data input/output lines when an address of a predetermined area of the at least one shared memory area is applied to the semiconductor memory device.

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