Wafer level phosphor coating method and devices fabricated utilizing method

• US 20080173884A1
• Filed: 01/22/2007
• Published: 07/24/2008
• Est. Priority Date: 01/22/2007
• Status: Active Grant

• Current Assignee: Creeled Incorporated
• Original Assignee: CREE Incorporated (Wolfspeed, Inc.)
• Inventors: Seruto, James, Ibbetson, James, Keller, Bernd, Chakraborty, Arpan, Tarsa, Eric J., Fu, Yankun, Chitnis, Ashay
• Granted Patent: US 9,024,349 B2
• Time in Patent Office: Days
• US Class Current: 257/98
• CPC Class Codes: H01L 23/3114 the device being a chip scale package, e.g. CSP
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2933/0041 relating to wavelength conversion elements
• CPC Class Codes: H01L 33/38 with a particular shape
• CPC Class Codes: H01L 33/387 with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/501 characterised by the materials, e.g. binder
• CPC Class Codes: H01L 33/507 the elements being in intimate contact with parts other than the semiconductor body or integrated with parts other than the semiconductor body
• CPC Class Codes: H01L 33/508 having a non-uniform spatial arrangement or non-uniform concentration, e.g. patterned wavelength conversion layer, wavelength conversion layer with a concentration gradient of the wavelength conversion material
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

Methods for fabricating light emitting diode (LED) chips comprising providing a plurality of LEDs typically on a substrate. Pedestals are deposited on the LEDs with each of the pedestals in electrical contact with one of the LEDs. A coating is formed over the LEDs with the coating burying at least some of the pedestals. The coating is then planarized to expose at least some of the buried pedestals while leaving at least some of said coating on said LEDs. The exposed pedestals can then be contacted such as by wire bonds. The present invention discloses similar methods used for fabricating LED chips having LEDs that are flip-chip bonded on a carrier substrate and for fabricating other semiconductor devices. LED chip wafers and LED chips are also disclosed that are fabricated using the disclosed methods.

Claims

1. A method for fabricating light emitting diode (LED) chips, comprising:

providing a plurality of LEDs;

depositing pedestals on said LEDs, each of said pedestals in electrical contact with one of said LEDs;

forming a coating over said LEDs, said coating burying at least some of said pedestals; and

planarizing said coating leaving at least some of said coating on said LEDs while exposing at least some of said buried pedestals.

2. The method of claim 1, wherein said LED chips emit white light.

3. The method of claim 1, further comprising depositing a contact on each said LEDs said pedestals formed on said contacts.

4. The method of claim 1, wherein said LEDs are provided on a growth substrate.

5. The method of claim 1, wherein said LEDs are mounted on a carrier substrate.

6. The method of claim 1, wherein said carrier substrate comprises a phosphor layer.

7. The method of claim 1, wherein said LEDs comprise at least a portion of a growth substrate.

8. The method of claim 7, wherein said substrate is shaped or textured.

9. The method of claim 1, wherein said step of forming a coating over said LEDs comprises providing a prefabricated coating layer and placing it over said LEDs.

10. The method of claim 1, wherein said LEDs are provided on a substrate, further comprising forming trenches in said substrate and forming a second coating filling said trenches.

11. The method of claim 1, further comprising curing said coating prior to planarizing.

12. The method of claim 1, further comprising curing said coating following planarizing.

13. The method of claim 1, further comprising forming a surface texture on said coating.

14. The method of claim 13, wherein said surface texture is formed during said planarizing.

15. The method of claim 13, wherein said surface texture is formed by laser texturing.

16. The method of claim 1, further comprising singulating said LEDs.

17. The method of claim 1, wherein said coating comprises a phosphor loaded binder.

18. The method of claim 17, wherein said phosphor loaded binder comprises multiple phosphors.

19. The method of claim 1, wherein said coating comprises scattering particles.

20. The method of claim 1, wherein said coating comprises multiple layers with different compositions.

21. The method of claim 17, wherein said binder comprises one of the materials from the group consisting of silicone, epoxy, glass, spin-on glass, BCB, polymides and polymers.

22. The method of claim 17, wherein said phosphor comprises YAG:

Ce.

23. The method of claim 17, wherein said phosphor comprises a material from the group consisting of Y₃Al₅O₁₂:

Ce (YAG), Tb_3-xRE_xO₁₂;

Ce (TAG);

RE=Y,Gd,La,Lu, and Sr_2-x-yBa_xCa_ySiO₄;

Eu.

24. The method of claim 1, wherein said planarizing comprises one of the methods from the group consisting of grinding, lapping and polishing.

25. The method of claim 1, wherein said planarizing comprises one or more methods from the group consisting of squeegee, pressure planarization, etching and ablation.

26. The method of claim 1, wherein said coating covers said LEDs by one of the methods from the group consisting of spin coating, electrophoretic deposition, electrostatic deposition, printing, jet printing and screen printing.

27. The method of claim 1, wherein said pedestal is formed using stud bumping.

28. The method of claim 1, further comprising the step of forming a second coating around at least part of said LEDs.

29. The method of claim 28, wherein said second coating has a different composition than said coating.

30. The method of claim 28, further comprising the step of planarizing said second coating.

31. The method of claim 1, further comprising depositing a metal pad on said planarized coating interconnecting at least some of said pedestals to form an LED array.

32. The method of claim 16, further comprising sealing one of said singulated LEDs in a encapsulant.

33. The method of claim 16, further comprising mounting one of said LEDs to a submount or printed circuit board (PCB).

34. The method of claim 1, wherein said planarizing results in a uniform coating thickness.

35. The method of claim 1, wherein said coating thickness has a total thickness variation of less than 50% of the average coating thickness.

36. A method for fabricating LED chips, comprising:

flip-chip bonding a plurality of LEDs on a carrier substrate;

forming a conductive pedestal in electrical contact with each of the LEDs;

forming a coating over said LEDs, said coating burying at least some of said pedestals; and

planarizing said coating to expose at least some of said buried pedestals.

37. The method of claim 36, wherein said carrier substrate comprises electrical traces, said LEDs mounted in contact with said electrical traces.

38. The method of claim 36, wherein said pedestals are formed on said conductive traces.

39. The method of claim 36, wherein said LED chips emit white light.

40. A method for fabricating coated semiconductor devices, comprising:

providing a plurality of semiconductor devices on a substrate;

depositing pedestals on said semiconductor devices, each of which is in electrical contact with one of said semiconductor devices;

forming a coating over said semiconductor devices, said coating burying at least some of said pedestals; and

planarizing said coating leaving at least some of said coating material on said semiconductor devices while exposing at least some of said buried pedestals for contacting.

41. A light emitting diode (LED) chip wafer, comprising:

a plurality of LEDs;

a plurality of pedestals, each of which is in electrical contact with one of said LEDs; and

a coating at least partially covering said LEDs, at least some of said pedestals extending through and to the surface of said coating and exposed at the surface of said coating.

42. The LED chip wafer of claim 41, wherein said LEDs are on a substrate wafer.

43. The LED chip wafer of claim 41, further comprising a plurality of contacts, each of which is on one of said LEDs, at least some of said pedestals formed on said contacts.

44. The LED chip wafer of claim 41, wherein said substrate wafer is capable of being separated into LED chips.

45. The LED chip wafer of claim 41, wherein said coating has a uniform thickness.

46. The LED chip wafer of claim 41, wherein said coating has a total thickness variation of <

50% of the average coating thickness.

47. The LED chip wafer of claim 41, wherein said coating has a textured surface.

48. The LED chip wafer of claim 41, wherein said coating comprises multiple phosphors.

49. The LED chip wafer of claim 41, wherein said coating comprises scattering particles.

50. The LED chip wafer of claim 41, wherein said coating comprises a phosphor loaded binder.

51. The LED chip wafer of claim 50, wherein said binder comprises one of the materials from the group consisting of silicone, epoxy, glass, spin-on glass, BCB, polymides and polymers.

52. The LED chip wafer of claim 50, wherein said phosphor comprises YAG:

Ce.

53. The LED chip wafer of claim 41, wherein said pedestals comprise one or more stud bumps.

54. The LED chip wafer of claim 41, wherein said LEDs are made of materials from the Group-III nitride material system.

55. The LED chip wafer of claim 41, wherein said substrate wafer comprises a growth substrate.

56. The LED chip wafer of claim 41, wherein said substrate wafer comprises a carrier substrate.

57. The LED chip wafer of claim 41, wherein said LEDs are interconnected in an LED array.

58. The LED chip wafer of claim 41, a metal pad on the surface of said coating interconnecting at least some of said exposed pedestals to form an LED array.

59. The LED chip wafer of claim 41, further comprising a reflective layer formed integral to said substrate wafer.

60. The LED chip wafer of claim 42, wherein said substrate comprises a phosphor loaded binder layer.

61. The LED chip wafer of claim 41, wherein said LEDs comprise at least of portion of a growth substrate.

62. The LED chip wafer of claim 41, wherein said LEDs are provided on a substrate, further comprising trenches in said substrate and a second coating filling said trenches.

63. The LED chip wafer of claim 41, wherein said coating comprises multiple layers with different compositions.

64. The LED chip wafer of claim 41, further comprising the step of forming a second coating around at least part of said LEDs.

65. The LED chip wafer of claim 64, wherein said second coating has a different composition than said coating.

66. The LED chip wafer of claim 41, capable of emitting white light from said LEDs and coating.

67. An light emitting diode (LED) chip, comprising:

an LED;

a pedestal in electrical contact with said LED; and

a coating at least partially covering said LED, said pedestal extending through and to the surface of said coating and exposed at the surface of said coating.

68. The LED chip of claim 67, wherein said LED emits white light.

69. The LED chip of claim 67, wherein said LED is on a substrate.

70. The LED chip of claim 67, further comprising a contact on said LED, said pedestals formed on said contact.

71. The LED chip of claim 67, wherein said coating comprises a phosphor loaded binder.

72. The LED chip of claim 67, wherein said pedestal comprises one or more stud bumps.

73. The LED chip of claim 67, wherein said LED comprises materials from the Group-III nitride material system.

74. The LED chip of claim 67, wherein said substrate wafer comprises a growth substrate.

75. The LED chip of claim 67, wherein said substrate wafer comprises a carrier substrate.

76. The LED chip wafer of claim 67, further comprising a reflective layer formed integral to said substrate.

77. A light emitting diode (LED) package comprising:

an LED chip;

a pedestal in electrical contact with said LED chips; and

a coating at least partially covering said LED chip, said pedestal extending through and to the surface of said coating and exposed at the surface of said coating;

package leads, said pedestal in electrical connection with one of said package leads; and

encapsulation surrounding said LED chip and electrical connections.

78. A light emitting diode (LED) package comprising:

an LED chip;

a pedestal in electrical contact with said LED chips; and

a coating at least partially covering said LED chip, said pedestal extending through and to the surface of said coating and exposed at the surface of said coating; and

package leads, said pedestal in electrical connection with one of said package leads, wherein the chip is enclosed by a hermetically sealed cover.

79. The LED package of claim 78, wherein an inert atmosphere surrounds the LED chip at or below atmospheric pressure.