TILED ELECTRONIC DISPLAY STRUCTURE

• US 20080174515A1
• Filed: 08/30/2006
• Published: 07/24/2008
• Est. Priority Date: 02/17/1998
• Status: Active Grant

• Current Assignee: MEC Management, LLC (Three Affiliated Tribes of the Fort Berthold Reservation, North Dakota)
• Original Assignee: Transpacific Infinity LLC
• Inventors: Atherton, James Harold, Hechis, Dennis J., Shen, Zilan, Matthies, Dennis Lee, Stewart, Roger Green, Busta, Heinz H.
• Granted Patent: US 7,864,136 B2
• Time in Patent Office: Days
• US Class Current: 345/1.3
• CPC Class Codes: G02F 1/13336 Combining plural substrates to produce large-area displays, e.g. tiled displays
• CPC Class Codes: G02F 1/133512 Light shielding layers, e.g. black matrix G02F1/136209 takes precedence
• CPC Class Codes: G09G 2300/026 Video wall, i.e. juxtaposition of a plurality of screens to create a display screen of bigger dimensions
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2320/048 using evaluation of the usage time
• CPC Class Codes: G09G 3/3208 organic, e.g. using organic light-emitting diodes [OLED]
• CPC Class Codes: H01L 25/167 comprising optoelectronic devices, e.g. LED, photodiodes
• CPC Class Codes: H01L 27/156 two-dimensional arrays
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H10K 50/85 Arrangements for extracting light from the devices
• CPC Class Codes: H10K 50/86 Arrangements for improving contrast, e.g. preventing reflection of ambient light
• CPC Class Codes: H10K 59/18 Tiled displays
• CPC Class Codes: H10K 59/875 Arrangements for extracting light from the devices
• CPC Class Codes: H10K 59/8791 Arrangements for improving contrast, e.g. preventing reflection of ambient light
• CPC Class Codes: H10K 59/8792 comprising light absorbing layers, e.g. black layers

Abstract

A tiled display device is formed from display tiles having picture element (pixel) positions defined up to the edge of the tiles. Each tile includes a memory which stores display data, and pixel driving circuitry which controls the scanning and illumination of the pixels on the tile. The tiles are formed in two parts, an electronics section and a display section. Each of these parts includes connecting pads which cover several pixel positions. Each connecting pad makes an electrical connection to only one row electrode or column electrode. The connecting pads on the display section are electrically connected and physically joined to corresponding connecting pads on the electronics section to form a complete tile.

Claims

1. An apparatus, comprising:

a circuit board having a first side and a second side;

a display material being disposed on the first side of said circuit board, said display material having one or more pixels formed thereon in one or more pixel areas of said display material;

one or more electrodes disposed in one or more pixel areas of said display material; and

an electronic circuit being disposed on a second side of said circuit board;

wherein said circuit board comprises one or more vias extending from the second side of said circuit board to one or more pixels of said display material to couple said electronic circuit with one or more of said electrodes of the display.

2. An apparatus as claimed in claim 1, wherein one or more of the vias are disposed in a peripheral area of said circuit board.

3. An apparatus as claimed in claim 1, further comprising a transparent layer disposed on the first side of said circuit board over at least a portion of said display material.

5. An apparatus as claimed in claim 1, further comprising an optical interface coupled to said electronic circuit to couple said electronic circuit to one or more optical devices.

8. An apparatus as claimed in claim 1, wherein one or more pixels are located within the pixel area in a location capable of allowing the vias to couple to said one or more electrodes within the pixel area without interfering with a regular spacing of the pixels from said circuit board to an adjacent circuit board in a multiple circuit board display.

9. An apparatus as claimed in claim 1, wherein a distance between a center of one or more edge pixels of the display is located at a distance from an edge of said circuit board that is equal to, or approximately equal to, or less than one-half of a pixel pitch of the pixels.

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11. An apparatus, comprising:

a transparent plate;

a display material being disposed on the transparent plate, said display material having one or more pixels formed thereon in one or more pixel areas of said display material;

one or more electrodes disposed in one or more pixel areas of said display material;

a circuit board, wherein said display material is at least partially disposed between said transparent plate and said circuit board; and

an electronic circuit being disposed on said circuit board;

wherein said circuit board comprises one or more vias extending through said circuit board to one or more pixels of said display material to couple said electronic circuit with one or more of said electrodes.

12. An apparatus as claimed in claim 11, wherein one or more of the vias are disposed in a peripheral area of said circuit board.

13. An apparatus as claimed in claim 11, further comprising an insulating layer or a metal layer, or combinations thereof, disposed between said display material and said circuit board.

15. An apparatus as claimed in claim 11, further comprising an optical interface coupled to said electronic circuit to couple said electronic circuit to one or more optical devices.

18. An apparatus as claimed in claim 11, wherein one or more pixels are located within the pixel area in a location capable of allowing the vias to couple to said one or more electrodes within the pixel area without interfering with a regular spacing of the pixels from said circuit board to an adjacent circuit board in a multiple circuit board display.

19. An apparatus as claimed in claim 11, wherein a distance between a center of one or more edge pixels of the display is located at a distance from an edge of said circuit board that is equal to, or approximately equal to, or less than one-half of a pixel pitch of the pixels.

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21. An apparatus, comprising:

a frame;

one or more displays capable of being disposed within said frame in a tile arrangement;

one or more flexible connectors disposed on said frame for electrically coupling with the one or more displays to allow control of one or more of said displays as a combined display;

wherein one or more of said displays comprises;

a circuit board having a first side and a second side;

a display material being disposed on the first side of said circuit board, said display material having one or more pixels formed thereon in one or more pixel areas of said display material;

one or more electrodes disposed in one or more pixel areas of said display material; and

an electronic circuit being disposed on a second side of said circuit board;

wherein said circuit board comprises one or more vias extending from the second side of said circuit board to one or more pixels of said display material to couple said electronic circuit with one or more of said electrodes.

22. An apparatus as claimed in claim 21, wherein one or more of the vias are disposed in a peripheral area of said circuit board.

23. An apparatus as claimed in claim 21, further comprising a transparent layer disposed on the first side of said circuit board over at least a portion of said display material.

24. An apparatus as claimed in claim 21, said circuit board comprising one or more of a ceramic, a glass ceramic, or a glass, or combinations thereof.

25. An apparatus as claimed in claim 21, further comprising an optical interface coupled to said electronic circuit to couple said electronic circuit to one or more optical devices.

26. An apparatus as claimed in claim 21, wherein one or more pixels are offset from a center of the pixel area in a first direction, or in a second direction, or combinations thereof.

27. An apparatus as claimed in claim 21, wherein one or more pixels comprise approximately 25 percent of the pixel area.

28. An apparatus as claimed in claim 21, wherein one or more pixels are located within the pixel area in a location capable of allowing the vias to couple to said one or more electrodes within the pixel area without interfering with a regular spacing of the pixels from said circuit board to an adjacent circuit board in a multiple circuit board display.

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