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HYBRID BUILT-IN SELF TEST (BIST) ARCHITECTURE FOR EMBEDDED MEMORY ARRAYS AND AN ASSOCIATED METHOD

  • US 20080178053A1
  • Filed: 03/28/2008
  • Published: 07/24/2008
  • Est. Priority Date: 01/29/2004
  • Status: Active Grant
First Claim
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1. A built-in self test (BIST) architecture comprising:

  • a controller adapted to operate at a lower operating frequency than a plurality of associated memory arrays; and

    command multipliers in communication with said controller and associated with said memory arrays,wherein said controller is further adapted to communicate, to said command multipliers, instructions for performing test functions on said memory arrays, andwherein each specific command multiplier is adapted to selectively operate in one of two modes;

    a first mode, wherein said specific command multiplier is adapted to multiply said instructions so that said test functions are performed at a higher operating frequency of said specific memory array, anda second mode, wherein said specific command multiplier is adapted to suspend multiplication of said instructions so that said test functions are performed at said lower operating frequency.

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