Stacked integrated circuit assembly
First Claim
Patent Images
1. A stacked integrated circuit assembly, comprising:
- a substrate having a top surface with at least one substrate connection pad;
a first flip chip integrated circuit (FFIC) disposed above the substrate;
a second flip chip integrated circuit (SFIC) disposed above the FFIC, the FFIC disposed between the substrate and the SFIC;
at least one solder connection between the substrate connection pad and the FFIC; and
and at least one solder connection between the FFIC and the SFIC.
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Abstract
A stacked integrated circuit assembly includes a substrate having a top surface with at least one substrate connection pad. A first flip chip integrated circuit (FFIC) is disposed above the substrate, and a second flip chip integrated circuit (SFIC) is disposed above the FFIC. The FFIC is disposed between the substrate and the SFIC. The stacked integrated circuit assembly includes least one solder connection between the substrate connection pad and the FFIC and at least one solder connection between the FFIC and the SFIC.
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Citations
20 Claims
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1. A stacked integrated circuit assembly, comprising:
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a substrate having a top surface with at least one substrate connection pad;
a first flip chip integrated circuit (FFIC) disposed above the substrate;a second flip chip integrated circuit (SFIC) disposed above the FFIC, the FFIC disposed between the substrate and the SFIC; at least one solder connection between the substrate connection pad and the FFIC; and and at least one solder connection between the FFIC and the SFIC. - View Dependent Claims (2, 3)
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4. A stacked integrated circuit assembly, comprising:
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a substrate having a top surface, and at least one substrate connection pad disposed upon the top surface; a first flip chip integrated circuit (FFIC), the FFIC including; a FFIC front surface and opposite thereto a FFIC back surface, the FFIC front surface proximate to the substrate top surface; at least one FFIC front connection pad disposed upon the FFIC front surface, each FFIC front connection pad aligned to at least one substrate connection pad; at least one electrically conductive through die via, each through die via electrically coupled to one FFIC front connection pad and extending from the FFIC front surface to the FFIC back surface; at least one FFIC back connection pad disposed upon the FFIC back surface, each FFIC back connection pad electrically coupled to one through die via; and a die having a first semiconductor material; a second flip chip integrated circuit (SFIC), the SFIC including; a SFIC front surface and opposite thereto a SFIC back surface, the SFIC front surface proximate to the FFIC back surface; at least one SFIC front connection pad disposed upon the SFIC front surface, each SFIC front connection pad aligned to at least one FFIC back connection pad; and a die having a second semiconductor material, the second semiconductor material differing from the first semiconductor material; a first solder connection between each FFIC front connection pad and each substrate connection pad, the first solder connection establishing a first gap between the FFIC front surface and the substrate; and a second solder connection between each SFIC front connection pad and each FFIC back connection pad, the second solder connection establishing a second gap between the SFIC front surface and the FFIC back surface; and wherein the assembly is operable to process microwave frequency electrical signals. - View Dependent Claims (5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A method of producing an assembly having two stacked dice, comprising the steps of:
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fabricating a first wafer having a plurality of first dice; fabricating a second wafer having a plurality of second dice; applying a first solder bump to each of an at least one second die front connection pad disposed on a front surface of each second die; dicing the second wafer into a plurality of discrete second dice; mounting a predetermined quantity of the discrete second dice onto the first wafer such that each second die front connection pad aligns with an at least one first die back connection pad disposed upon a back surface of each first die; melting each first solder bump; applying a second solder bump to each of an at least one first die front connection pad disposed upon a front surface of each first die; and dicing the first wafer into a plurality of discrete first dice having a respective discrete second die coupled to each discrete first die. - View Dependent Claims (19, 20)
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Specification