Delay unit
First Claim
1. A delay unit, comprising:
- an oscillator for receiving an input signal and generating a clock signal; and
a counter connected to said oscillator for receiving said clock signal, generating a delay signal, and feeding back said delay signal to said oscillator.
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Accused Products
Abstract
The present invention is related to a delay unit, and more particularly to a delay unit with respect to delay an input signal. The delay unit comprises a ring oscillator and a counter. The ring oscillator receives an input signal and generates a clock signal. The counter connects to the ring oscillator for receiving the clock signal and generating a delay signal. The delay signal feeds back to the ring oscillator to stop the ring oscillator, and the power consumed in the delay unit can be reduced. The ring oscillator comprises a plurality of inverters and the counter comprises a plurality of flip-flops, and the delay unit can generate an accurately and/or large delay time by changing the number of the inverters and/or the flip-flops.
12 Citations
14 Claims
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1. A delay unit, comprising:
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an oscillator for receiving an input signal and generating a clock signal; and a counter connected to said oscillator for receiving said clock signal, generating a delay signal, and feeding back said delay signal to said oscillator. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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Specification