ANTI-TAMPER PROTECTED ENCLOSURE

• US 20080180245A1
• Filed: 01/25/2007
• Published: 07/31/2008
• Est. Priority Date: 01/25/2007
• Status: Active Grant

• Current Assignee: Verifone, Inc. (Verifone Systems, Inc.)
• Original Assignee: Verifone, Inc. (Verifone Systems, Inc.)
• Inventors: Hong, Daniel, Chao, Kenji, Hsu, Steve, Manchester, Douglas
• Granted Patent: US 7,898,413 B2
• Time in Patent Office: Days
• US Class Current: 340/571
• CPC Class Codes: G06F 21/86 Secure or tamper-resistant housings

Abstract

A device for containing sensitive data including a housing, an anti-tamper protected enclosure located within the housing and being adapted to contain the sensitive data, anti-tamper protection circuitry located within the anti-tamper protected enclosure and at least one ball grid array arranged within the housing and mounted on an outer surface of the anti-tamper protected enclosure and electrically coupled to the anti-tamper protection circuitry for protecting against unauthorized access to the interior of the anti-tamper protected enclosure.

Claims

1. A device for containing sensitive data comprising:

a housing;

an anti-tamper protected enclosure located within said housing and being adapted to contain said sensitive data;

anti-tamper protection circuitry located within said anti-tamper protected enclosure; and

at least one ball grid array device arranged within said housing and mounted on an outer surface of said anti-tamper protected enclosure and electrically coupled to said anti-tamper protection circuitry for protecting against unauthorized access to the interior of said anti-tamper protected enclosure.

2. A device according to claim 1 and also comprising a confidential data storage element located within said anti-tamper protected enclosure.

3. A device according to claim 1 and wherein said at least one ball grid array device includes wire-bonded circuitry.

4. A device according to claim 1 and wherein said anti-tamper protected enclosure includes at least one conductor network which is electrically coupled to said anti-tamper protection circuitry.

5. A device according to claim 4 and wherein said anti-tamper protection circuitry is coupled to said at least one conductor network via said at least one ball grid array device.

6. A device according to claim 5 and wherein said anti-tamper protection circuitry is coupled to said at least one conductor network by electrical connections extending through vias which are physically protected by said at least one ball grid array device.

7. A device according to claim 1 and wherein the physical location of said at least one ball grid array device is selected to provide physical protection to at least one electrical connection within said anti-tamper protected enclosure.

8. A device according to claim 1 and wherein said at least one ball grid array device includes balls which are not electrically connected to said anti-tamper protection circuitry.

9. A device according to claim 1 and wherein said anti-tamper protected enclosure comprises at least one flexible printed circuit board.

10. A device according to claim 1 and wherein said anti-tamper protected enclosure comprises at least one rigid printed circuit board.

11. A device according to claim 1 and wherein said anti-tamper protection circuitry is operative, in the event of physical tampering with at least one of said at least one ball grid array, to perform at least one of the following actions:

generate an alarm indication, disable the device and erase said sensitive data.

12. A device according to claim 1 wherein said device is a point of sale terminal.

13. An anti-tamper protected enclosure comprising:

anti-tamper protection circuitry located within said anti-tamper protected enclosure; and

at least one ball grid array device mounted on an outer surface of said anti-tamper protected enclosure and electrically coupled to said anti-tamper protection circuitry for protecting against unauthorized access to the interior of said anti-tamper protected enclosure.

14. An anti-tamper protected enclosure according to claim 13 and also comprising a confidential data storage element located within.

15. An anti-tamper protected enclosure according to claim 13 including at least one conductor network which is electrically coupled to said anti-tamper protection circuitry.

16. An anti-tamper protected enclosure according to claim 15 and wherein said anti-tamper protection circuitry is coupled to said at least one conductor network via said at least one ball grid array device.

17. An anti-tamper protected enclosure according to claim 16 and wherein said anti-tamper protection circuitry is coupled to said at least one conductor network by electrical connections extending through vias which are physically protected by said at least one ball grid array device.

18. An anti-tamper protected enclosure according to claim 13 and wherein the physical location of said at least one ball grid array device is selected to provide physical protection to at least one electrical connection within said anti-tamper protected enclosure.

19. An anti-tamper protected enclosure according to claim 13 and wherein said at least one ball grid array device includes balls which are not electrically connected to said anti-tamper protection circuitry.

20. An anti-tamper protected enclosure according to claim 13 and wherein said anti-tamper protected enclosure comprises at least one flexible printed circuit board.

21. An anti-tamper protected enclosure according to claim 13 and wherein said anti-tamper protected enclosure comprises at least one rigid printed circuit board.

22. An anti-tamper protected enclosure according to claim 13 and wherein said anti-tamper protection circuitry includes a comparison circuit.

23. An anti-tamper protected enclosure according to claim 13 and wherein said anti-tamper protection circuitry is operative, in the event of physical tampering with at least one of said at least one ball grid array, to generate an alarm indication.

24. An anti-tamper protected enclosure according to claim 13 and wherein said at least one ball grid array device includes wire-bonded circuitry.