Apparatus, methods and systems for amplifier

• US 20080180559A1
• Filed: 01/31/2007
• Published: 07/31/2008
• Est. Priority Date: 01/31/2007
• Status: Active Grant

• Current Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Original Assignee: Micron Technology, Inc.
• Inventors: Yan, Hai
• Granted Patent: US 7,990,452 B2
• Time in Patent Office: Days
• US Class Current: 348/307
• CPC Class Codes: H03F 3/45188 Non-folded cascode stages
• CPC Class Codes: H04N 25/00 Circuitry of solid-state image sensors [SSIS]; Control thereof
• CPC Class Codes: H04N 25/67 applied to fixed-pattern noise, e.g. non-uniformity of response
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/76 Addressed sensors, e.g. MOS or CMOS sensors
• CPC Class Codes: H04N 25/766 comprising control or output lines used for a plurality of functions, e.g. for pixel output, driving, reset or power
• CPC Class Codes: H04N 25/78 Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters
• CPC Class Codes: H04N 3/1568 for disturbance correction or prevention within the image-sensor, e.g. biasing, blooming, smearing correction circuits H04N25/62

Abstract

Various embodiments comprise apparatus, methods, and systems that include an amplification apparatus comprising a first input, a second input, and an output, a first plurality of series-connected transistors including a first transistor having a first channel ratio and a first gate coupled to the first input, and a second plurality of series-connected transistors including a second transistor having a second channel ratio that is greater than the first channel ratio, the second transistor including a second gate coupled to the second input.

Claims

1. An amplification apparatus comprising:

a first input, a second input, and an output;

a first plurality of series-connected transistors including a first transistor having a first channel ratio and a first gate coupled to the first input; and

a second plurality of series-connected transistors including a second transistor having a second channel ratio that is greater than the first channel ratio, the second transistor including a second gate coupled to the second input.

2. The amplification apparatus of claim 1, wherein each of the transistors in the first plurality of series-connected transistors has a channel ratio about equal to the first channel ratio.

3. The amplification apparatus of claim 1, wherein each of the transistors in the second plurality of series-connected transistors has a channel ratio about equal to the second channel ratio.

4. The amplification apparatus of claim 1, wherein the first channel ratio is determined by dividing a channel width of the first transistor by a channel length of the first transistor.

5. The amplification apparatus of claim 1, wherein the second channel ratio is determined by dividing a channel width of the second transistor by a channel length of the second transistor.

6. The amplification apparatus of claim 1, wherein the second channel ratio is about 5 times the first channel ratio.

7. The amplification apparatus of claim 1, wherein the second channel ratio is about 10 times the first channel ratio.

8. The amplification apparatus of claim 1, wherein the second channel ratio is an integer multiple of about 2 to about 11 of the first channel ratio.

9. The amplification apparatus of claim 1, including:

a bias current source coupled to the first transistor and to the second transistor and operable to provide a total biasing current split between the first transistor and the second transistor approximately in proportion to the first channel ratio and the second channel ratio, respectively.

10. The amplification apparatus of claim 9, including:

a slew rate approximately proportional to a ratio of the second channel ratio divided by the first channel ratio.

11. The amplification apparatus of claim 1, wherein the apparatus includes a column amplifier coupled to a sample and hold capacitor to receive an output current from the column amplifier.

12. The amplification apparatus of claims 1, wherein the apparatus includes a telescopic amplifier coupled to a sample and hold capacitor to receive an output current from the column amplifier.

13. A method comprising:

receiving a first input signal at a first input of an amplification apparatus, the first input coupled to a first transistor having a first channel ratio;

receiving a second input signal at a second input of the amplification apparatus, the second input coupled to a second transistor having a second channel ratio that is approximately N times greater than the first channel ratio, wherein N is greater than or equal to two; and

amplifying the first and second input signals to provide an output signal at an output of the amplification apparatus.

14. The method of claim 13, wherein amplifying the first and the second input signals includes:

providing the output signal having a slew rate that is approximately proportional to N.

15. The method of claim 13, wherein amplifying the first and second input signals includes:

providing the output signal having a gain bandwidth that is determined by approximately twice the value of N divided by N+1.

16. The method of claim 13, wherein N has a value of about 5 to about 10.

17. The method of claim 13, wherein receiving the first input signal includes:

receiving the first input signal from a column line coupled to an array of imaging sensors.

18. The method of claim 13, wherein providing the output signal at the output coupled to the second transistor includes the amplification apparatus providing an output current I_out at the output determined by a formula:

I_out≈

V_d*(2*N)/(N+1)*(I_b/Vsat_2nd)

wherein V_d is a differential voltage appearing between the first input and the second input, N is a fraction determined by the second channel ratio and the first channel ratio, I_b is a total bias current of the amplifier, and Vsat_2nd is a saturation voltage of the second transistor.

19. The method of claim 13, wherein providing the output signal includes:

providing a voltage to a sample and hold capacitor representing a difference between the first input signal and a reference voltage provided as the second input signal.

20. The method of claim 13, wherein receiving the second input signal includes:

selecting a pixel from a plurality of pixels, each of the plurality of pixels having an output, and receiving the output of the selected pixel as the second input signal.

21. A system comprising:

a sensor including an array of pixels, the array of pixels including a plurality of columns of pixels, wherein some of the plurality of columns of pixels include a plurality of pixels and a column line coupled to an output of each of the plurality of pixels; and

a plurality of column amplifiers, wherein at least one of the plurality of column amplifiers are coupled to a single one of the column lines at a first column amplifier input and to a voltage reference at a second column amplifier input, and wherein the at least one of the plurality of column amplifiers includes a first transistor having a first channel ratio and a first gate coupled to the single one of the column lines, and a second transistor having a second channel ratio that is greater than the first channel ratio, the second transistor including a second gate coupled to the voltage reference.

22. The system of claim 21 including:

a control circuit coupled to at least some of the column lines included in each of the plurality of columns of pixels, the control circuit operable to control an electrical coupling of each of the pixels to one of the first column amplifier inputs.

23. The system of claim 21, wherein some of the plurality of column amplifiers include an output coupled to a readout circuit having a sample and hold capacitor.

24. The system of claim 21, wherein some of the plurality of column amplifiers include a switch coupling an output of the column amplifier to the first column amplifier input of the column amplifier.

25. The system of claim 24, including:

a control circuit coupled to the switch and operable to open and close the switch, wherein closing the switch provides a reset of a value stored in a sample and hold capacitor, and opening the switch provides an amplified sample of an output from one of the plurality of pixels to the sample and hold capacitor.

26. The system of claim 21, wherein the second channel ratio is an integer multiple between about 2 and 11 of the first channel ratio.

27. The system of claim 21, wherein some of the plurality of column amplifiers include a first group of transistors in a first plurality of series-connected transistors having a channel ratio about equal to the first channel ratio, and a second group of transistors in a second plurality of series-connected transistors having a channel ratio about equal to the second channel ratio.

28. The system of claim 21, wherein some of the plurality of column amplifiers provide an output current I_out at an output determined by a formula:

I_out≈

V_d*(2*N)/(N+1)*(I_b/Vsat_2nd)

wherein V_d is a differential voltage appearing between the first column amplifier input and the second column amplifier input, N is a fraction determined by the second channel ratio and the first channel ratio, I_b is a total bias current of the column amplifier, and Vsat_2nd is a saturation voltage of the second transistor.

29. The system of claim 21, wherein the sensor includes:

a complementary metal oxide sensor.

30. A system comprising:

a cell phone including a camera and a lens to provide images to a sensor including an array of pixels, the array of pixels including a plurality of columns of pixels, wherein some of the plurality of columns of pixels include a plurality of pixels and a column line coupled to an output of each of the plurality of pixels; and

a plurality of column amplifiers, wherein at least one of the plurality of column amplifiers are coupled to a single one of the column lines at a first column amplifier input and to a voltage reference at a second column amplifier input, and wherein the at least one of the plurality of column amplifiers includes a first transistor having a first channel ratio and a first gate coupled to the single one of the column lines, and a second transistor having a second channel ratio that is greater than the first channel ratio, the second transistor including a second gate coupled to the voltage reference.

31. The system of claim 30, wherein some of the plurality of column amplifiers provide an output current I_out at an output determined by the formula:

I_out≈

V_d*(2*N)/(N+1)*(I_b/Vsat_2nd)

wherein V_d is a differential voltage appearing between the first column amplifier input and the second column amplifier input, N is a fraction determined by the second channel ratio and the first channel ratio, I_b is a total bias current of the column amplifier, and Vsat_2nd is a saturation voltage of the second transistor.

32. The system of claim 30, further including:

a memory for storing images received by the camera.

33. The system of claim 30, further including:

an input/output connection coupled to an antenna operable to email images received by the camera.

34. The system of claim 30, further including:

a keypad to user input including text to be superimposed on at least one image received by the camera.

35. The system of claim 30, wherein the sensor includes:

a complementary metal oxide sensor.

36. A system comprising:

a digital camera including a lens to provide images to a sensor including an array of pixels, the array of pixels including a plurality of columns of pixels, wherein some of the plurality of columns of pixels include a plurality of pixels and a column line coupled to an output of each of the plurality of pixels; and

a plurality of column amplifiers, wherein at least one of the plurality of column amplifiers are coupled to a single one of the column lines at a first column amplifier input and to a voltage reference at a second column amplifier input, and wherein the at least one of the plurality of column amplifiers includes a first transistor having a first channel ratio and a first gate coupled to the single one of the column lines, and a second transistor having a second channel ratio that is greater than the first channel ratio, the second transistor including a second gate coupled to the voltage reference.

37. The system of claim 36, wherein some of the plurality of column amplifiers provide an output current I_out at an output determined by the formula:

I_out≈

V_d*(2*N)/(N+1)*(I_b/Vsat_2nd)

wherein V_d is a differential voltage appearing between the first column amplifier input and the second column amplifier input, N is a fraction determined by the second channel ratio and the first channel ratio, I_b is a total bias current of the column amplifier, and Vsat_2nd is a saturation voltage of the second transistor.

38. The system of claim 36, wherein the sensor includes:

a complementary metal oxide sensor.

39. A system comprising:

a cell phone including a camera, the camera having a column amplifier comprising;

a first input, a second input, and an output;

a first plurality of series-connected transistors including a first transistor having a first channel ratio and a first gate coupled to the first input; and

a second plurality of series-connected transistors including a second transistor having a second channel ratio that is greater than the first channel ratio, the second transistor including a second gate coupled to the second input.

40. The system of claim 39, wherein each of the transistors in the second plurality of series-connected transistors has a channel ratio about equal to the second channel ratio.

41. The system of claim 39, wherein the first channel ratio is determined by dividing a channel width of the first transistor by a channel length of the first transistor.

42. The system of claim 39, wherein the second channel ratio is determined by dividing a channel width of the second transistor by a channel length of the second transistor.

43. The system of claim 39, wherein the second channel ratio is an integer multiple of about 2 to about 11 of the first channel ratio.

44. A method comprising:

receiving an image at a lens of a digital camera;

providing the image to a pixel array; and

coupling a signal from the pixel array to at least one amplifier apparatus,

wherein coupling the signal to the at least one amplifier includes;

receiving a first input signal at a first input of the amplification apparatus,

the first input coupled to a first transistor having a first channel ratio;

receiving a second input signal at a second input of the amplification apparatus, the second input coupled to a second transistor having a second channel ratio that is approximately N times greater than the first channel ratio, wherein N is greater than or equal to two; and

amplifying the first and second input signals to provide an output signal at an output of the amplification apparatus.

45. The method of claim 44, wherein amplifying the first and the second input signals includes:

providing the output signal having a slew rate that is approximately proportional to N.

46. The method of claim 44, wherein amplifying the first and second input signals includes:

providing the output signal having a gain bandwidth that is determined by approximately twice the value of N divided by N+1.

47. The method of claim 44, wherein N has a value of about 5 to about 10.

48. The method of claim 44, wherein providing the output signal at the output coupled to the second transistor includes the amplifier providing an output current I_out at the output determined by the formula:

I_out≈

V_d*(2*N)/(N+1)*(I_b/Vsat_2nd)

wherein V_d is a differential voltage appearing between the first input and the second input, N is a fraction determined by the second channel ratio and the first channel ratio, I_b is a total bias current of the amplifier, and Vsat_2nd is a saturation voltage of the second transistor.

49. The method of claim 44, wherein providing the output signal includes:

providing a voltage to a sample and hold capacitor representing a difference between the first input signal and a reference voltage provided as the second input signal.

50. The method of claim 44, wherein receiving a second signal includes:

selecting a pixel from a plurality of pixels, each of the plurality of pixels having an output, and receiving the output of the selected pixel as the second signal.