MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE USING STI TECHNIQUE

• US 20080182381A1
• Filed: 10/18/2007
• Published: 07/31/2008
• Est. Priority Date: 10/20/2006
• Status: Abandoned Application

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: KIYOTOSHI, Masahiro
• Application Number:
  US11/874,292
• Publication Number:
  US 20080182381A1
• Time in Patent Office: Days
• US Class Current: 438/427
• CPC Class Codes: H01L 21/76229 Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches

Abstract

A first trench and a second trench having width wider than the first trench are simultaneously formed in a main surface area of a semiconductor substrate. The width of an opening portion of the first trench is made narrower by forming a first insulating film on the main surface of the semiconductor substrate and in the first and second trenches. A second insulating film is formed on the first insulating film by use of a high-density plasma-CVD method to form a void in the first trench while covering the opening portion of the first trench, and the second trench is filled with the second insulating film. Then, part of the second insulating film which covers the opening portion is removed by anisotropic etching and the void is filled with an insulating film having fluidity at the film formation time.

Claims

1. A manufacturing method of a semiconductor device comprising:

forming a first isolation trench and a second isolation trench having width wider than the first isolation trench in a main surface area of a semiconductor substrate,

forming a first insulating film on the main surface area of the semiconductor substrate and in the first and second isolation trenches and narrowing width of an opening portion of the first isolation trench,

forming a second insulating film on the first insulating film by use of a high-density plasma-CVD method, forming a void in the first isolation trench while covering the opening portion of the first isolation trench and filling the second isolation trench with the second insulating film,

removing part of the second insulating film which covers the opening portion by anisotropic etching, and

filling the void with an insulating film having fluidity at a film formation time.

2. The manufacturing method of the semiconductor device according to claim 1, wherein a mask member used as a mask is left behind at an end time of the anisotropic etching process in the forming of the first isolation trench and the second isolation trench having the width wider than the first isolation trench.

3. The manufacturing method of the semiconductor device according to claim 1, wherein the narrowing the width of the opening portion of the first isolation trench includes conformally forming the first insulating film in the first isolation trench by a CVD method.

4. The manufacturing method of the semiconductor device according to claim 1, wherein the narrowing the width of the opening portion of the first isolation trench includes forming thermal oxide films by thermally oxidizing inner surfaces of the first and second isolation trenches and forming a first insulating film which is a liner insulating film on the thermal oxide films.

5. The manufacturing method of the semiconductor device according to claim 1, wherein the forming of the void in the first isolation trench while covering the opening portion of the first isolation trench and filling the second isolation trench with the second insulating film consists of performing an anisotropic film formation process by forming a film in a state where deposition and sputtering processes both occur by means of a high-density plasma-CVD method.

6. The manufacturing method of the semiconductor device according to claim 1, wherein the insulating film having fluidity at the film formation time is a spin-on glass (SOG) film formed by use of a coating material.

7. The manufacturing method of the semiconductor device according to claim 6, wherein the coating material contains one selected from a group consisting of polysilazane, hydrogen silsesquioxane ((HSiO_3/2)_n, where n is an integral number) film and chemical vapor condensation film as a main component.

8. The manufacturing method of the semiconductor device according to claim 1, wherein the width of the first isolation trench after narrowing the width of the opening portion of the first isolation trench is not wider than 20 nm.

9. The manufacturing method of the semiconductor device according to claim 1, wherein the width of the second isolation trench is not less than 100 nm.

15. The manufacturing method of the semiconductor device according to claim 1, wherein the insulating film having fluidity at the film formation time is a spin-on glass (SOG) film formed by use of a coating material.

16. The manufacturing method of the semiconductor device according to claim 15, wherein the coating material contains one selected from a group consisting of polysilazane, hydrogen silsesquioxane ((HSiO_3/2)_n, where n is an integral number) film and chemical vapor condensation as a main component.

10. A manufacturing method of a semiconductor device comprising:

forming a first isolation trench in a main surface area of a semiconductor substrate,

forming a first insulating film on the main surface area of the semiconductor substrate and in the first isolation trench,

filling the first isolation trench with an insulating film having fluidity at a film formation time via the first insulating film by forming an insulating film having fluidity at the film formation time on the first insulating film,

forming a second isolation trench having width wider than the first isolation trench, and

filling the second isolation trench with a second insulating film by means of a high-density plasma-CVD method.

11. The manufacturing method of the semiconductor device according to claim 10, which further comprises forming a barrier film on the first isolation trench after the filling of the first isolation trench with the insulating film having fluidity at the film formation time and in which the forming of the second isolation trench is performed after the forming of the barrier film.

12. The manufacturing method of the semiconductor device according to claim 11, wherein the barrier film is one of a silicon oxide film and silicon nitride film.

13. The manufacturing method of the semiconductor device according to claim 10, which further comprises forming a thermal oxide film by thermally oxidizing the inner surface of the first isolation trench after the forming of the first isolation trench and before the forming of the first insulating film and in which the forming of the first insulating film consists of forming a liner insulating film on the thermal oxide film.

14. The manufacturing method of the semiconductor device according to claim 11, further comprising forming a thermal oxide film by thermally oxidizing the inner surface of the second isolation trench after the forming of the second isolation trench and before the filling of the second isolation trench with the second insulating film.

17. The manufacturing method of the semiconductor device according to claim 10, wherein the width of the first isolation trench after the first insulating film is formed is not wider than 20 nm.

18. The manufacturing method of the semiconductor device according to claim 10, wherein the width of the second isolation trench is not less than 100 nm.