Firmware ROM Patch Method

• US 20080184072A1
• Filed: 01/31/2007
• Published: 07/31/2008
• Est. Priority Date: 01/31/2007
• Status: Active Grant

• Current Assignee: Microchip Technology Incorporated
• Original Assignee: Microchip Technology Incorporated
• Inventors: Kumar, Ravindra, Rockford, John Glen, Odlivak, Andrew J., Stearns, Warren R.
• Granted Patent: US 9,348,730 B2
• Time in Patent Office: Days
• US Class Current: 714/32
• CPC Class Codes: G06F 11/3628 of optimised code optimisation G06F8/443
• CPC Class Codes: G06F 11/3644 by instrumenting at runtime
• CPC Class Codes: G06F 11/3648 using additional hardware

Abstract

A system in which firmware residing in ROM may be upgraded without re-spinning silicon. A one-bit flag may be assigned for each patchable function representing a firmware upgrade. The first statement of each function may check its associated flag and determine if patch-code should be executed in place of the current function residing in ROM. If the flag is not set, the code may continue executing normally. If the flag is set, a function identifier may be placed into a global memory location, and an assembly language “jump” instruction may be executed, redirecting program control to a specified location in a volatile Scratch Read Only Memory (SROM) where the corresponding patched code may be stored. If more than one function is patched, the global identifier may be used to determine which patched function to execute. Using an assembly language “jump” instruction to redirect control results in the patched function'"'"'s returning normally to its calling function once it has completed executing.

Claims

1. A method for patching firmware residing within a non-rewritable memory (NRM) comprised in a system, wherein the firmware is mapped to a first area of program memory, the method comprising:

specifying a first set of instructions corresponding to a respective first portion of the firmware;

assigning a first flag to the first set of instructions, wherein the first flag is configured to indicate whether to execute the first set of instructions or the respective first portion of the firmware;

writing the first set of instructions into a second memory comprised in the system, wherein the first set of instructions are mapped to a second area of program memory distinct from the first area of program memory; and

checking the first flag to determine whether to execute the first set of instructions or the respective first portion of the firmware.

2. The method of claim 1, further comprising:

executing the first set of instructions if the first flag indicates that the first set of instructions should be executed; and

executing the respective first portion of the firmware if the first flag does not indicate that the first set of instructions should be executed.

3. The method of claim 1, further comprising:

specifying additional sets of instructions, wherein each one of the additional sets of instructions corresponds to a respective additional portion of the firmware;

assigning a respective flag to each one of the additional sets of instructions, wherein each respective flag is configured to indicate whether to execute its assigned additional set of instructions or the respective additional portion of the firmware corresponding to the respective flag'"'"'s assigned additional set of instructions; and

writing the additional sets of instructions into the second memory, wherein each one of the additional sets of instructions is mapped to a respective area of program memory distinct from the first area of program memory, from the second area of program memory, and from respective areas of program memory to which other ones of the additional sets of instructions are mapped.

4. The method of claim 3, further comprising:

checking one or more of the respective flags to determine whether to execute;

the additional set of instructions to which the checked respective flag has been assigned;

or

the respective additional portion of the firmware corresponding to the additional set of instructions to which the checked respective flag has been assigned.

5. The method of claim 4, further comprising:

executing the additional set of instructions to which the checked respective flag has been assigned, if the checked respective flag indicates that the additional set of instructions to which the checked respective flag has been assigned should be executed; and

executing the respective additional portion of the firmware corresponding to the additional set of instructions to which the checked respective flag has been assigned, if the checked respective flag does not indicate that the additional set of instructions to which the checked respective flag has been assigned should be executed.

7. The method of claim 1, wherein said checking is performed by executing a second portion of the firmware, wherein the first portion of the firmware and the second portion of the firmware form a first subroutine/function comprised in the firmware.

8. The method of claim 1, further comprising setting the first flag to indicate that the first set of instructions should be executed instead of the respective first portion of the firmware.

9. The method of claim 1, further comprising:

placing a first identifier corresponding to the first set of instructions into a first location of global memory, if the first flag indicates that the first set of instructions should be executed instead of the respective first portion of the firmware;

determining from the first identifier that the first set of instructions should be executed; and

executing the first set of instructions.

10. The method of claim 1, wherein the second memory is a rewritable memory.

11. A method for updating one or more functions comprised in program code residing within a read-only memory (ROM) comprised in a system, wherein the program code is mapped to a first area of program memory, and wherein each of the one or more functions comprises a first portion and a second portion, the method comprising:

specifying a respective patched function for each one of the one or more functions;

assigning each respective patched function to a respective flag, wherein each respective flag is configured to indicate whether to execute its assigned respective patched function or the second portion of the one or more functions for which its assigned respective patched function has been specified; and

writing each respective patched function into a rewritable memory comprised in the system, wherein each respective patched function is mapped to a respective area of program memory distinct from respective areas of program memory to which other respective patched functions are mapped.

12. The method of claim 11, further comprising checking one or more respective flags to determine whether to execute the respective patched function assigned to the checked respective flag, or the second portion of the one or more functions for which the respective patched function assigned to the checked respective flag has been specified.

13. The method of claim 12, further comprising:

executing the respective patched function assigned to the checked respective flag, if the checked respective flag indicates that its assigned respective patched function should be executed; and

executing the second portion of the one or more functions for which the respective patched function assigned to the checked respective flag has been specified, if the checked respective flag does not indicate that its assigned respective patched function should be executed.

14. The method of claim 12, wherein said checking one or more respective flags is performed by executing the first portion of the one or more functions for which the respective patched function assigned to the checked respective flag has been specified.

15. A system comprising:

a non-rewritable memory (NRM) configured to hold main program instructions mapped to a first area of program memory;

a rewritable memory configured to store;

secondary program instructions corresponding to a first portion of the main program instructions, wherein the secondary program instructions are mapped to a second area of program memory distinct from the first program area of program memory; and

a first flag indicating whether to execute the secondary program instructions or the first portion of the main program instructions; and

a processing unit operable to;

execute the main program instructions if the first flag indicates that the main program instructions should be executed; and

execute the secondary program instructions if the first flag indicates that the secondary program instructions should be executed.

16. The system of claim 15, wherein the rewritable memory is further configured to store:

one or more additional sets of program instructions, each corresponding to a respective distinct portion of the main program instructions, wherein each of the additional sets of program instructions are mapped to a respective area of program memory distinct from the first area of program memory and each respective area of program memory to which other ones of the one or more additional sets of program instructions are mapped; and

a respective flag corresponding to each of the one or more additional sets of program instructions, wherein each respective flag indicates whether to execute its corresponding additional set of program instructions or the respective distinct portion of the main program instruction corresponding to the respective flag'"'"'s corresponding additional set of program instructions.