VIRTUAL ARCHITECTURE AND INSTRUCTION SET FOR PARALLEL THREAD COMPUTING
First Claim
1. A method for defining a parallel processing operation, the method comprising:
- providing first program code defining a sequence of operations to be performed for each of a plurality of virtual threads in an array of cooperating virtual threads;
compiling the first program code into a virtual thread program defining a sequence of per-thread instructions to be executed for a representative virtual thread of the plurality of virtual threads, the sequence of per-thread instructions including at least one instruction that defines a cooperative behavior between the representative virtual thread and one or more other virtual threads of the plurality of virtual threads; and
storing the virtual thread program.
2 Assignments
0 Petitions
Accused Products
Abstract
A virtual architecture and instruction set support explicit parallel-thread computing. The virtual architecture defines a virtual processor that supports concurrent execution of multiple virtual threads with multiple levels of data sharing and coordination (e.g., synchronization) between different virtual threads, as well as a virtual execution driver that controls the virtual processor. A virtual instruction set architecture for the virtual processor is used to define behavior of a virtual thread and includes instructions related to parallel thread behavior, e.g., data sharing and synchronization. Using the virtual platform, programmers can develop application programs in which virtual threads execute concurrently to process data; virtual translators and drivers adapt the application code to particular hardware on which it is to execute, transparently to the programmer.
174 Citations
21 Claims
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1. A method for defining a parallel processing operation, the method comprising:
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providing first program code defining a sequence of operations to be performed for each of a plurality of virtual threads in an array of cooperating virtual threads; compiling the first program code into a virtual thread program defining a sequence of per-thread instructions to be executed for a representative virtual thread of the plurality of virtual threads, the sequence of per-thread instructions including at least one instruction that defines a cooperative behavior between the representative virtual thread and one or more other virtual threads of the plurality of virtual threads; and storing the virtual thread program. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method for operating a target processor, the method comprising:
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providing input program code including a first portion defining a sequence of operations to be performed for each of a plurality of virtual threads in an array of virtual threads adapted to process an input data set to generate an output data set, the input program code further including a second portion defining a dimension of the array of virtual threads; compiling the first portion of the input program code into a virtual thread program defining a sequence of per-thread instructions to be executed for a representative virtual thread of the plurality of virtual threads, the sequence of per-thread instructions including at least one instruction that defines a cooperative behavior between the representative virtual thread and one or more other virtual threads of the plurality of virtual threads; converting the second portion of the input program code into a sequence of function calls to a virtual function library, the library including virtual functions that initialize and cause execution of the array of cooperating virtual threads; translating the virtual thread program and the sequence of function calls into program code executable on a target platform architecture, the executable program code defining one or more real threads that execute the array of cooperating virtual threads; executing the executable program code on a computer system conforming to the target platform architecture, thereby generating the output data set; and storing the output data set in a storage medium. - View Dependent Claims (14, 15, 16, 17)
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18. A method for operating a target processor, the method comprising:
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obtaining a virtual thread program defining a sequence of per-thread instructions to be executed for a representative virtual thread of a plurality of virtual threads in a virtual thread array adapted to process an input data set to generate an output data set, the sequence of per-thread instructions including at least one instruction that defines a cooperative behavior between the representative virtual thread and one or more other virtual threads of the plurality of virtual threads; obtaining additional program code defining dimensions of the virtual thread array; translating the virtual thread program and the additional program code into program code executable on the target platform architecture, the executable program code defining one or more platform threads that execute the virtual thread array; executing the executable program code on a computer system conforming to the target platform architecture, thereby generating the output data set and storing the output data set in a memory. - View Dependent Claims (19, 20, 21)
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Specification