MLC SELECTED MULTI-PROGRAM FOR SYSTEM MANAGEMENT

• US 20080189473A1
• Filed: 02/07/2007
• Published: 08/07/2008
• Est. Priority Date: 02/07/2007
• Status: Abandoned Application

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Murray, Michael
• Application Number:
  US11/672,076
• Publication Number:
  US 20080189473A1
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7209 Validity control, e.g. using flags, time stamps or sequence numbers

Abstract

Methods, apparatus, and systems may operate to utilize at least one of a single level cell structured or a multi-level cell structured non-volatile memory device organized as a plurality of data blocks, including at least one full page block having one or more full pages comprising a plurality of contiguous sectors. Further activities may include utilizing page blocks that include status indicators to determine the validity of data contained within selected pages. Additional activities may include checking the associated status indicator prior to transferring information to and from the selected page.

Claims

1. A method, comprising:

receiving a memory allocation request from a processor to manage a memory array comprising at least one of a single level cell structure or a multi-level cell structure and organized as a plurality of blocks, each of the blocks comprising a group of sectors capable of storing a plurality of data bits;

assigning at least one page block from the plurality of blocks for memory storage, the at least one page block comprising at least one page;

assigning at least one status indicator to the at least one page, the status indicator to indicate validity status of data stored within the at least one page; and

storing the data within the group of sectors included in the at least one page.

2. The method of claim 1, comprising:

reading the at least one status indicator prior to storing the data.

3. The method of claim 2, wherein reading the at least one status indicator includes determining the data stored within the at least one page is invalid.

4. The method of claim 3, comprising:

checking the at least one status indicator upon a subsequent power cycle of the processor.

5. The method of claim 1, comprising:

erasing at least one sector from the group of sectors of at least one of the plurality of blocks upon receiving a memory allocation request associated with a write operation, wherein the at least one status indicator indicates invalid information is stored within the at least one page to which it is assigned.

6. The method of claim 1, comprising:

writing at least one address of the group of sectors to a first lookup table; and

referencing a second lookup table to determine a number of written sectors of the group of sectors within the at least one page.

7. The method of claim 1, wherein assigning at least one page block from the plurality of blocks includes assigning an upper page portion and a lower page portion as part of the at least one page.

8. The method of claim 7, wherein assigning an upper page portion is disallowed until the lower page portion is first utilized.

9. The method of claim 1, wherein assigning at least one status indicator to the at least one page comprises:

setting at least one bit of the at least one status indicator to a logical zero to indicate invalid status.

10. The method of claim 1, wherein reserving at least one status indicator to the at least one page comprises:

setting at least one bit of the at least one status indicator to a logical one to indicate valid status.

11. The method of claim 1, wherein the memory allocation request is associated with at least one write operation.

12. The method of claim 1, wherein the memory allocation request is associated with at least one read operation.

13. A method comprising:

managing access to a multi-level cell non-volatile memory device organized as a plurality of data blocks comprising at least one page block, the at least one page block comprising at least one page of a plurality of sectors, and at least one status indicator to indicate validity status of data stored within the at least one page, wherein managing access comprises;

assigning the at least one status indicator comprising a storage location for at least one bit to indicate the status of the at least one page;

storing an address in at least one sector of the plurality of sectors to logically associate the at least one sector with the at least one page; and

storing data within the at least one sector of the plurality of sectors associated with the at least one page.

14. The method of claim 13, comprising:

reading the at least one status indicator prior to storing the data within the at least one sector of the plurality of sectors.

15. The method of claim 13, wherein managing access comprises:

dividing the at least one page by assigning an upper page portion and a lower page portion.

16. The method of claim 15, wherein assigning an upper page portion is disallowed until the lower page portion is first utilized.

17. The method of claim 13, comprising:

checking the at least one status indicator upon a next power cycle of the processor.

18. The method of claim 13, comprising:

erasing at least one sector from the plurality of sectors of at least one of the plurality of data blocks upon receiving a memory allocation request associated with a write operation, wherein the status indicator indicates the data stored within the at least one page is invalid.

19. The method of claim 13, wherein assigning the at least one status indicator is associated with a write operation.

20. The method of claim 13, wherein assigning the at least one status indicator is associated with a read operation.

21. The method of claim 13, wherein assigning at least one status indicator comprises:

shifting data from the at least one sector of a first block of the plurality of blocks to the at least one sector of a second block of the plurality of blocks; and

programming the status indicator to indicate the data stored within the first block is invalid.

22. A method comprising:

managing access to a multi-level cell non-volatile memory device organized as a plurality of data blocks comprising at least one page block, the at least one page block comprising at least one page with a plurality of sectors and at least one status indicator to indicate validity status of data stored within the at least one page, wherein managing access comprises;

searching among the plurality of page blocks to identify a first page block having the status indicator indicating the data stored within the first page block is invalid; and

selecting the first page block to be used for storing data.

23. The method of claim 22, wherein selecting the first page block includes erasing at least one sector of the first page block and storing data within the at least one sector.

24. The method of claim 23, wherein erasing the at least one sector includes programming the at least one status indicator to indicate the data stored within the first page block is valid.

25. The method of claim 23, wherein erasing the at least one sector includes storing an address in the at least one sector to logically associate the at least one sector with the at least one page block.

26. An apparatus, comprising:

a multi-level non-volatile memory device organized as a plurality of data blocks comprising at least one page block including at least one page with a plurality of contiguous sectors;

at least one status indicator assigned to the at least one page block, the status indicator to indicate the status of data stored within the at least one page block; and

a sector count table maintained within a random access memory, the sector count table to store a number of the plurality of contiguous sectors that are filled with the data.

27. The apparatus of claim 26, wherein the at least one status indicator is configured to be read prior to storing the data in the at least one page block assigned to the status indicator.

28. The apparatus of claim 26, wherein the at least one status indicator is configured to be assigned to the at least one page of the at least one page block.

29. The apparatus of claim 26, wherein the at least one status indicator comprises a storage location capable of storing the state of at least one bit of the data stored within the plurality of contiguous sectors.

30. The apparatus of claim 26, wherein the at least one status indicator is configured to indicate validity status of the data stored in at least one sector of the plurality of contiguous sectors.

31. The apparatus of claim 26, wherein each of the plurality of contiguous sectors are selectively programmable, selectively erasable, and uniquely addressable.

32. The apparatus of claim 26, wherein the at least one page includes an upper page portion and a lower page portion, and wherein the memory device is configured to assign the at least one status indicator to at least the lower page portion.

33. The apparatus of claim 32, wherein the memory device is configured to transfer a second part of the data to the upper page portion after transferring a first part of the data to the lower page portion.

34. The apparatus of claim 26, wherein the memory device comprises a NAND flash memory.

35. A system, comprising:

a processor to issue a memory allocation request;

a display to display data processed by the processor;

a plurality of memory cells to be selected in response to receiving the memory allocation request, wherein the memory cells are organized to comprise at least one page block including at least one page comprising a plurality of contiguous sectors, each of the plurality of contiguous sectors being selectively programmable, selectively erasable, and uniquely addressable; and

a status indicator assigned to the at least one page block, the status indicator to indicate validity status of the data stored within the at least one page block.

36. The system of claim 35, wherein the plurality of memory cells comprise at least one of a single level cell structure or a multi-level cell structure.

37. The system of claim 35, wherein the plurality of memory cells comprise a NAND flash memory array.

38. The system of claim 35, comprising:

a lens; and

an imaging plane to couple to the processor, the imaging plane arranged to receive light captured by the lens.

39. The system of claim 35, comprising:

a cellular telephone transceiver to receive the data processed by the processor.

40. The system of claim 35, comprising:

a media player and a keypad control module to couple to the processor.

41. The system of claim 35, comprising:

a dynamic random access memory array to couple to the processor and to store a lookup table to contain information associated with the plurality of contiguous sectors.

42. A method of operating a memory system comprising:

receiving a data allocation request from a processor;

accessing a cache register to select an available memory cell of a plurality of memory cells in the memory system responsive to receiving the data allocation request, wherein the plurality of memory cells are organized as a plurality of blocks, each of the blocks comprising a group of sectors capable of storing a plurality of data bits;

assigning at least one page block from the plurality of blocks for memory storage, the at least one page block comprising at least one page; and

assigning at least one status indicator to the at least one page, the status indicator to indicate validity status of data stored within the at least one page.

43. The method of claim 42, wherein assigning at least one page block includes:

storing an address in at least one sector of the plurality of sectors to logically associate the at least one sector with the at least one page; and

storing the data within the at least one sector of the plurality of sectors associated with the at least one page.

44. The method of claim 42, wherein assigning at least one status indicator includes:

searching among the plurality of page blocks to identify a first page block having the status indicator indicating the data stored within the first page block is invalid; and

selecting the first page block to be used for storing the data.