Schottky Diode Structure with Silicon Mesa and Junction Barrier Schottky Wells

• US 20080191304A1
• Filed: 02/09/2007
• Published: 08/14/2008
• Est. Priority Date: 02/09/2007
• Status: Active Grant

• Current Assignee: Wolfspeed, Inc.
• Original Assignee: CREE Incorporated (Wolfspeed, Inc.)
• Inventors: Zhang, Qingchun, Ryu, Sei-Hyung
• Granted Patent: US 8,384,181 B2
• Time in Patent Office: Days
• US Class Current: 257/471
• CPC Class Codes: H01L 27/0814 Diodes only
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/6606 the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
• CPC Class Codes: H01L 29/872 Schottky diodes

Abstract

A power diode having a silicon mesa atop the drift region includes a first contact positioned on the silicon mesa. The silicon mesa is highly doped p-type or n-type, and the anode may be formed on the mesa. The mesa may include two separate silicon layers, one of which is a Schottky barrier height layer. Under a forward bias, the silicon mesa provides carriers to achieve desirable forward current characteristics. The substrate has a significantly reduced thickness. The diode achieves reverse voltage blocking capability by implanting junction barrier Schottky wells within the body of the diode. The diode utilizes a deeper portion of the drift region to support the reverse bias. The method of forming the diode with a silicon mesa includes forming the mesa within a window on the diode or by thermally or mechanically bonding the silicon layer to the drift region.

Claims

1. A Schottky diode comprising:

a first semiconductor layer of a first conductivity type forming a drift region, said drift region having a top surface and a bottom surface;

at least one doped well formed within the conductive channel in said drift region and adjacent said top surface, said doped well having the opposite conductivity type as said drift region; and

a silicon mesa formed on said top surface of said drift region adjacent said doped well.

2. A Schottky diode according to claim 1, wherein said silicon mesa comprises a silicon Schottky barrier layer on said drift region and a second layer of silicon on said barrier layer.

3. A Schottky diode according to claim 1, wherein said drift region is n−

type silicon carbide, said well is p+ type silicon carbide, and said mesa is n−

type silicon.

4. A Schottky diode according to claim 1, wherein said drift region is n−

type silicon carbide, said well is p+ type silicon carbide, and said mesa is p+ type silicon.

5. A Schottky diode according to claim 1, wherein said drift region further comprises termination wells at said top surface and adjacent the edges of said mesa, said termination wells arresting current flow at said edges.

6. A Schottky diode according to claim 1, further comprising a conductive substrate on said bottom surface of said drift region.

7. A Schottky diode according to claim 6, wherein said substrate is less than about 100 microns thick.

8. A Schottky diode according to claim 7, wherein said substrate is less than about 25 microns thick.

9. A Schottky diode according to claim 6, further comprising a cathode contact on the surface of said substrate opposite said drift region.

10. A Schottky diode according to claim 1, further comprising an anode contact on said mesa.

11. A Schottky diode according to claim 1, further comprising a passivation layer covering the sides of said mesa and the top surface of said drift region adjacent said mesa.

12. A Schottky diode according to claim 1, wherein said drift region is about 25 microns thick.

13. A Schottky diode according to claim 1, wherein said drift region is doped to about 3×

10¹⁵ cm<sup>−

3</sup>.

14. A Schottky diode comprising:

a drift region of a first conductivity type, said drift region having a top surface and a bottom surface;

at least one doped well formed within the conductive channel in said drift region and adjacent said top surface;

said doped well having the opposite conductivity type as said drift region;

a silicon mesa formed on said top surface of said drift region adjacent said doped well, wherein said drift region supports a maximum electric field without breakdown throughout a thickness of more than one micron in said drift region.

15. A Schottky diode according to claim 14, wherein said maximum electric field is greater than 1.4×

10⁶ V/cm.

16. A Schottky diode according to claim 14, wherein said diode has a current density that is greater than 50 amps/cm² at an anode voltage of 2 volts.

17. A Schottky diode according to claim 14, wherein the maximum reverse blocking voltage is greater than 2800 V.

18. Schottky diode according to claim 14, wherein said drift region is n−

type silicon carbide, said well is p+ type silicon carbide, and said mesa is n−

type silicon.

19. A Schottky diode according to claim 14, wherein said drift region is n−

type silicon carbide, said well is p+ type silicon carbide, and said mesa is p+ type silicon.

20. A Schottky diode according to claim 14, wherein said drift region further comprises termination wells at said top surface and adjacent the edges of said mesa, said termination wells arresting current flow at said edges.

21. A Schottky diode according to claim 14, further comprising a conductive substrate on said bottom surface of said drift region.

22. A Schottky diode according to claim 21, wherein said substrate is less than about 100 microns thick.

23. A Schottky diode according to claim 22, further comprising a cathode contact on the surface of said substrate opposite said drift region.

24. A Schottky diode according to claim 14, further comprising an anode contact on said mesa.

25. A Schottky diode according to claim 14, further comprising a passivation layer covering the sides of said mesa and the top surface of said drift region adjacent said mesa.

26. A Schottky diode according to claim 14, wherein said drift region is about 25 microns thick.

27. A Schottky diode according to claim 14, wherein said drift region is doped to about 3×

10¹⁵ cm<sup>−

3</sup>.

28. A Schottky diode according to claim 14, wherein said silicon mesa comprises a silicon Schottky barrier layer on said drift region and a second layer of silicon on said barrier layer.

29. A method of forming a Schottky diode, comprising:

growing a silicon carbide drift region having n−

doping type on a silicon carbide substrate;

forming at least one junction barrier Schottky well within the conductive channel of the drift region;

forming a silicon mesa on said drift region adjacent said junction barrier Schottky well.

30. The method of forming a Schottky diode according to claim 29, wherein the step of forming a silicon mesa comprises forming a silicon Schottky barrier layer on the drift region and forming a second silicon layer on the Schottky barrier layer.

31. The method of forming a Schottky diode according to claim 29, wherein prior to forming the silicon mesa, the method further comprises the step of implanting at least one doped termination well within said drift region between the junction barrier Schottky well and the edge of the drift region.

32. The method of forming a Schottky diode according to claim 31, further comprising the step of annealing the implanted wells to activate the dopants.

33. The method of forming a Schottky diode according to claim 32, further comprising the step of depositing a passivation layer on the surface of the drift region.

34. The method of forming a Schottky diode according to claim 33, comprising depositing a passivation layer selected from the group consisting of silicon nitride and silicon dioxide.

35. The method of forming a Schottky diode according to claim 33, further comprising the step of opening a window in the passivation layer so that at least one edge of the window aligns with the doped termination well and depositing the silicon mesa within the window.

36. The method of forming a Schottky diode according to claim 35, further comprising the step of doping the silicon mesa.

37. The method of forming a Schottky diode according to claim 29, wherein the step of forming a silicon mesa comprises thermally bonding a silicon wafer onto the drift region.

38. The method of forming a Schottky diode according to claim 29, wherein the step of forming the silicon mesa comprises mechanically bonding a silicon wafer onto the drift region.

39. The method of forming a Schottky diode according to claim 38, further comprising the step of doping the silicon wafer to either an n⁻

conductivity type or a p⁺ conductivity type within a region of the silicon wafer corresponding to the conductive channel of the diode.

40. The method of forming a Schottky diode according to claim 39, further comprising the step of etching the silicon wafer to form the mesa so that the edges of the mesa are adjacent the termination wells in the drift region.

41. The method of forming a Schottky diode according to claim 29, further comprising the step of grinding the substrate to a thickness less than 100 microns.

42. The method of forming a Schottky diode according to claim 41, wherein the substrate is ground to a thickness less than 25 microns.

43. The method of forming a Schottky diode according to claim 41, further comprising depositing ohmic contacts to the silicon mesa and to the surface of the substrate opposite the drift region.

44. The method of forming a Schottky diode according to claim 31, further comprising the step of dicing the diode along the edges of the drift region.

45. A Schottky diode comprising:

a drift region of a first conductivity type, said drift region having a top surface and a bottom surface;

a silicon mesa formed on said top surface of said drift region,

at least one doped well formed within said drift region and adjacent said top surface, said doped well positioned closer to the midpoint of said top surface of said drift region than to either edge of said mesa, said doped well having the opposite conductivity type as said drift region.

46. A Schottky diode according to claim 45, wherein the reverse leakage current is less than 5×

10<sup>−

6</sup> amps at a reverse blocking voltage of 600 V.

47. A Schottky diode according to claim 45, wherein said mesa comprises p-type polysilicon.

48. A Schottky diode according to claim 45, wherein said drift region is no greater than 25 microns thick.

49. A Schottky diode according to claim 45, wherein said mesa comprises n-type polysilicon.

50. A Schottky diode according to claim 45, further comprising a substrate supporting said drift region, said substrate having a thickness that is less than 25 microns.