Passive circuits for de-multiplexing display inputs

• US 20080192029A1
• Filed: 02/08/2007
• Published: 08/14/2008
• Est. Priority Date: 02/08/2007
• Status: Abandoned Application

• Current Assignee: Snaptrack Incorporated (Qualcomm, Inc.)
• Original Assignee: Snaptrack Incorporated (Qualcomm, Inc.)
• Inventors: Wadhwa, Sameer, Anderson, Michael Hugh, Antonio, Franklin
• Application Number:
  US11/704,450
• Publication Number:
  US 20080192029A1
• Time in Patent Office: Days
• US Class Current: 345/204
• CPC Class Codes: G02B 26/001 based on interference in an adjustable optical cavity interference filters G02B5/28; devices or arrangements using multiple reflections in spectrometry or monochromators G01J3/26
• CPC Class Codes: G09G 2310/0218 with collection of electrodes in groups for n-dimensional addressing
• CPC Class Codes: G09G 2310/0267 Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/3466 based on interferometric effect

Abstract

A display array which can reduce the row connections between the display and the driver circuit and methods of manufacturing and operating the same are disclosed. In one embodiment, a display device comprises an array of microelectromechanical system (MEMS) display elements and a plurality of passive impedance network circuits coupled to said array and configured to provide row output voltages to drive said array. Each passive impedance network comprises an output to a row of display elements and three or more inputs. No more than one input is shared by two passive impedance networks.

Claims

1. A display device comprising:

an array of microelectromechanical system (MEMS) display elements; and

a plurality of passive impedance network circuits coupled to said array and configured to provide row output voltages to drive said array, each passive impedance network comprising an output to a row of display elements and three or more inputs,

wherein for each passive impedance network the output is controlled by the three or more inputs, and wherein each input is at one of two pre-determined voltages.

2. The device of claim 1, wherein each passive impedance network comprises a resistor network.

3. The device of claim 1, wherein each passive impedance network is substantially the same.

4. The device of claim 1, wherein each passive impedance network circuit further comprises three or more resistors, each resistor connecting a different one of the inputs to the output.

5. The device of claim 4, wherein the three or more resistors have substantially the same resistance.

6. The device of claim 1, wherein one of the pre-determined voltages is ground.

7. A display device comprising:

an array of microelectromechanical system (MEMS) display elements; and

a plurality of passive impedance network circuits coupled to said array and configured to provide row output voltages to drive said array, each passive impedance network comprising an output to a row of display elements and three or more inputs,

wherein each passive impedance network circuit shares no more than one input with any other passive impedance network circuit.

8. The device of claim 7, wherein the plurality of passive impedance network circuit is arranged according to a Styler Triple system.

9. The device of claim 7, further comprising:

a display;

a processor that is in electrical communication with said display, said processor being configured to process image data; and

a memory device in electrical communication with said processor.

10. The device of claim 9, further comprising a driver circuit configured to send at least one signal to said display.

11. The device of claim 10, further comprising a controller configured to send at least a portion of said image data to said driver circuit.

12. The device of claim 9, further comprising an image source module configured to send said image data to said processor.

13. The device of claim 12, wherein said image source module comprises at least one of a receiver, transceiver, and transmitter.

14. The device of claim 9, further comprising an input device configured to receive input data and to communicate said input data to said processor.

15. A display device comprising:

means for displaying image data; and

means for demultiplexing one or more row driving voltages and providing demultiplexed voltages to said displaying means.

16. The device of claim 15, wherein said displaying means comprises one or more MEMS display elements.

17. A method of making a display device, the method comprising:

forming an array of microelectromechanical system (MEMS) display elements on a substrate; and

forming a plurality of passive impedance network circuits coupled to said array and configured to provide row output voltages to drive said array, each passive impedance network comprising an output to a row of display elements and three or more inputs, wherein for each passive impedance network the output is controlled by the three or more inputs, and wherein each input is at one of two pre-determined voltages.

18. The method of claim 17, wherein one of the pre-determined voltages is ground.

19. A method of making a display device, the method comprising:

forming an array of microelectromechanical system (MEMS) display elements on a substrate; and

forming a plurality of passive impedance network circuits coupled to said array and configured to provide row output voltages to drive said array, each passive impedance network comprising an output to a row of display elements and three or more inputs,

wherein the plurality of passive impedance network circuits are connected to each other in a manner such that each passive impedance network circuit shares no more than one input with any other passive impedance network circuit.

20. A method of demultiplexing a row driving voltage in a row by row addressing scheme of a display device, said method comprising:

applying a first control voltage to a first set of output nodes including a selected output node through a first set of series impedances;

applying a second control voltage to a second set of output nodes through a second set of series impedances, said second set including said selected output node and not including any other output nodes of said first set; and

applying a third control voltage to a third set of output nodes through a third set of series impedances, said third set including said selected output node and not including any other output nodes of said first set or said second set.

21. The method of claim 20, wherein said control voltages are substantially equal.

22. The method of claim 21, wherein said series impedances are substantially equal.