NON-VOLATILE MEMORY DEVICE HAVING MONITORING MEMORY CELL AND RELATED METHOD OF DRIVING USING VARIABLE READ VOLTAGE

• US 20080192541A1
• Filed: 01/31/2008
• Published: 08/14/2008
• Est. Priority Date: 02/13/2007
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: KANG, Sang-gu, LIM, Young-ho
• Granted Patent: US 8,023,323 B2
• Time in Patent Office: Days
• US Class Current: 365/185.03
• CPC Class Codes: G11C 11/5642 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 2211/5634 Reference cells

Abstract

A non-volatile memory device and related method of driving data are disclosed. The non-volatile memory device includes an array of multi level cells and a monitoring memory cell. The method of driving including performing a preliminary read operation with respect to a monitoring memory cell using a first read voltage, determining whether data initially stored in the monitoring memory cell is identical with data read from the monitoring memory cell during the preliminary read operation, and setting a main read voltage to a level different from the level of the first read voltage when the data initially stored in the monitoring memory cell is not identical with the data read from the monitoring memory cell in relation to the first read voltage.

Claims

1. A method of driving a non-volatile memory device including an array of multi level cells and a monitoring memory cell, the method comprising:

performing a preliminary read operation with respect to a monitoring memory cell using a first read voltage;

determining whether data initially stored in the monitoring memory cell is identical with data read from the monitoring memory cell during the preliminary read operation; and

setting a main read voltage to a level different from the level of the first read voltage when the data initially stored in the monitoring memory cell is not identical with the data read from the monitoring memory cell in relation to the first read voltage.

2. The method of claim 1, further comprising:

performing a main read operation with respect to the memory cell array using the main read voltage.

3. The method of claim 2, wherein setting of the main read voltage comprises:

performing a read operation on the monitoring memory cell using a second read voltage having a level different from the level of the first read voltage when the data initially stored in the monitoring memory cell is not identical with the data read from the monitoring memory cell in relation to the first read voltage; and

determining whether the data initially stored in the monitoring memory cell is identical with data read from the monitoring memory cell in relation to the second read voltage.

4. The method of claim 3, wherein setting of the main read voltage further comprises:

repeating a read operation directed to the monitoring memory cell with different read voltages and comparing read data from the monitoring memory cell derived in relation to the different read voltages with the data initially stored in the monitoring memory cell until the read data is identical to the initially stored data; and

defining the main read voltage in relation to a read voltage associated with one of the repetitions of the read operation and its corresponding read voltage.

5. The method of claim 1, wherein upon determining that the data initially stored in the monitoring memory cell is identical with data read from the monitoring memory cell in relation to the first read voltage, setting the main read voltage to the first read voltage.

6. The method of claim 1, wherein the monitoring memory cell is arranged to correspond with programming units of the memory cell array;

and

repeatedly performing the preliminary read operation, such that different main read voltages having different voltage levels are applied to the programming units according to different results for the repeatedly performed preliminary read operations applied to the monitoring memory cell.

7. The method of claim 1, wherein the monitoring memory cell is arranged in a partitioned area of the memory cell array;

and

a single main read voltage is applied to the programming units according to a result of the preliminary read operation applied to the monitoring memory cell.

8. The method of claim 1, wherein the monitoring memory cell comprises a plurality of cells adapted to store a plurality of data values corresponding to defined multi levels;

and

the operation of setting the main read voltage is performed for each one of a plurality of read voltages respectively associated with the plurality of data values.

9. The method of claim 1, wherein the monitoring memory cell comprises a memory cell storing a first data value selected from a plurality of data values respectively corresponding to defined multi levels;

and

the operation of setting the main read voltage is performed in relation to a read voltage associated with the first data.

10. The method of claim 1, further comprising:

selecting a main read voltage setting mode before performing the preliminary read operation.

11. A method of driving a non-volatile memory device including an array of multi level cells, the method comprising:

applying a first read voltage to a first wordline associated with a first programming unit and a corresponding first monitoring memory cell within a memory cell array;

performing a read operation with respect to the first programming unit and the first monitoring memory cell using the first read voltage;

determining whether data initially stored in the first monitoring memory cell is identical with data read from the first monitoring memory cell in relation to the first read voltage; and

performing a main read operation with respect to the first programming unit by setting a main read voltage to a level different from the level of the first read voltage and by providing the main read voltage to the first wordline, when the data initially stored in the monitoring memory cell is not identical with the data read from the first monitoring memory cell in relation to the first read voltage.

12. The method of claim 11, further comprising:

outputting data stored in the first programming unit obtained by reading data from the first programming unit and the first monitoring memory cell, when it is determined that the data initially stored in the first monitoring memory cell is identical with the data read from the first monitoring memory cell in relation to the first read voltage.

13. The method of claim 12, further comprising:

applying the first read voltage to a second wordline associated with a second programming unit and a corresponding second monitoring memory cell within the memory cell array;

performing a read operation with respect to the second programming unit and the second monitoring memory cell using the first read voltage; and

determining whether data initially stored in the second monitoring memory cell is identical with data read from the second monitoring memory cell in relation to the first read voltage.

14. The method of claim 13, further comprising:

upon determining that the data initially stored in the second monitoring memory cell is not identical with the data read from the second monitoring memory cell in relation to the second first read voltage, performing a main read operation with respect to the second programming unit using a main read voltage having a level different from the level of the first read voltage; and

upon determining that the data initially stored in the second monitoring memory cell is identical with data read from the second monitoring memory cell in relation to the first read voltage, outputting data read from the second programming unit.

15. The method of claim 14, wherein data is sequentially read from monitoring memory cells corresponding to third through n-th programming units within the memory cell array, and thereafter the respective data read from each respective monitoring memory cell corresponding to third through n-th programming units is compared with data initially stored in each respective monitoring memory cell corresponding to third through n-th programming units;

and

setting a main read voltage for each one of the third through n-th programming units in accordance with a respective comparison.

16. A non-volatile memory device including multi level cells, the non-volatile memory device comprising:

a memory cell array comprising a monitoring memory cell;

a wordline voltage generation unit generating a wordline voltage applied to the memory cell array;

a data comparison unit receiving read data from the monitoring memory cell in relation to a first read voltage and comparing the read data to reference data, and generating a corresponding comparison signal; and

a controller defining the level of the wordline voltage in response to the comparison signal.

17. The non-volatile memory device of claim 16, wherein the reference data is data initially stored in the monitoring memory cell.

18. The non-volatile memory device of claim 17, wherein upon determining that the read data is identical to the reference data, the controller defines a main read voltage used during a main read operation applied to the memory cell array to be equal to the first read voltage.

19. The non-volatile memory device of claim 18, wherein upon determining that the read data is not identical to the reference data, the controller defines a main read voltage used during a main read operation applied to the memory cell array to be different than the first read voltage.

20. The non-volatile memory device of claim 17, wherein the monitoring memory cell comprises a plurality of monitoring memory cells respectively arranged to correspond to different programming units with the memory cell array;

and

the wordline voltage comprises a plurality of wordline voltages respectively defined by the controller in relation to each one of the different programming units.

21. The non-volatile memory device of claim 17, wherein the monitoring memory cell is arranged in a partitioned area of the memory cell array.