METHOD FOR OPERATING BUFFER CACHE OF STORAGE DEVICE INCLUDING FLASH MEMORY

• US 20080195801A1
• Filed: 01/29/2008
• Published: 08/14/2008
• Est. Priority Date: 02/13/2007
• Status: Abandoned Application

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Park, Chan-ik, Cheon, Won-moon
• Application Number:
  US12/021,693
• Publication Number:
  US 20080195801A1
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0866 for peripheral storage systems, e.g. disk cache
• CPC Class Codes: G06F 2212/214 Solid state disk
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages

Abstract

Provided is a method for operating a buffer cache which is performed by a storage device including a flash memory. The method includes converting a logical block address requested from a host into a logical page number. A region in which a page corresponding to the logical page number is located is searched for. A physical block address corresponding to the logical block address is generated with reference to a mapping table of the region in which the page corresponding to the logical page number is located. The searching for of the region includes searching for a look-up table having information about a region in which a plurality of pages of the flash memory are located.

Claims

1. A method of operating a buffer cache in a storage device, the method comprising:

converting a logical block address requested from a host into a logical page number;

searching for a region of memory in which a page corresponding to the logical page number is located; and

generating a physical block address corresponding to the logical block address, with reference to a mapping table of the region of memory in which the page corresponding to the logical page number is located,

wherein the searching for the region of memory in which the page corresponding to the logical page number is located comprises searching within a look-up table having information about locations of a plurality of pages of a flash memory.

2. The method of claim 1, wherein the region of memory in which the page corresponding to the logical page number is located is located within the flash memory or a buffer cache.

3. The method of claim 1, wherein the look-up table comprises a plurality of entries, the number of the plurality of entries corresponding to the number of the plurality of pages of the flash memory.

4. The method of claim 3, wherein each entry of the look-up table has at least one bit of residence information indicating a region in which a page corresponding to the each entry is located.

5. The method of claim 4, wherein the residence information has a 1-bit value indicating whether the page corresponding to the each entry is located in the flash memory or the buffer cache.

6. The method of claim 4, wherein the residence information has a 2-bit value indicating whether the page corresponding to the each entry is located in a log block, a data block of the flash memory, or the buffer cache.

7. The method of claim 6, wherein the residence information further comprises information indicating whether the page corresponding to the each entry is located in both the buffer cache and the log block.

8. The method of claim 1, wherein the searching for the region of memory in which the page corresponding to the logical page number is located, comprises:

searching within an index of a look-up table corresponding to the logical page number;

determining the region in which the page corresponding to the logical page number is located, on the basis of residence information stored in corresponding index; and

when the page corresponding to the logical page number is located in the buffer cache, generating the physical block address with reference to a mapping table of the buffer cache.

9. The method of claim 8, wherein the generating of the physical block address with reference to the mapping table of the buffer cache, comprises:

searching an index of the buffer cache in which the page corresponding to the logical page number is located, with reference to a cache logical page number table having a list of a plurality of logical page numbers for a plurality of pages which are located in the buffer cache; and

associating a sector offset of the logical block address with the searched index, thereby generating the physical block address.

10. The method of claim 9, wherein the searching for of the index of the buffer cache comprises:

setting the requested logical page number;

performing bit masking on the set logical page number;

comparing the logical page number subjected to bit masking with the plurality of logical page numbers of the cache logical page number table, and searching an index having the same logical page number as the logical page number subjected to bit masking, from the cache logical page number table; and

searching for the physical block address of the buffer cache corresponding to the index of the cache logical page number table.

11. The method of claim 9, wherein each entry of the cache logical page number table corresponds to each entry of the buffer cache.

12. The method of claim 10, wherein each entry of the cache logical page number table comprises a first field storing a logical page number of a page located in an entry of the buffer cache corresponding to the each entry, and a second field storing page status information for the page corresponding to the logical page number of the first field.

13. The method of claim 11, wherein the page status information indicates whether data stored in the page corresponding to the logical page number is equal to the contents of the flash memory.

14. The method of claim 9, wherein the generating of the physical block address with reference to the mapping table of the buffer cache, further comprises determining a region in which a sector corresponding to a sector offset of the logical block address is located.

15. The method of claim 8, wherein the searching for of the region in which the page corresponding to the logical page number is located, further comprises generating the physical block address with reference to the mapping table of the flash memory when the page corresponding to the logical page number is located in the flash memory.

16. The method of claim 14, wherein the generating of the physical block address with reference to the mapping table of the flash memory, further comprises generating the physical block address with reference to a data block mapping table, when the page corresponding to the logical page number is located in a data block of the flash memory.

17. The method of claim 14, wherein the generating of the physical block address with reference to the mapping table of the flash memory, further comprises generating the physical block address with reference to a log block mapping table, when the page corresponding to the logical page number is located in a log block of the flash memory.

18. The method of claim 1, wherein the logical block address comprises a logical block number, a page offset, and a sector offset.

19. The method of claim 17, wherein the logical page number comprises the logical block number and the page offset.

20. The method of claim 1, wherein the host transmits the logical block address through an Advanced Technology Attachment (ATA) interface or a Serial Advanced Technology Attachment (SATA) interface.