Method, Apparatus and Program Product to Concurrently Detect, Repair, Verify and Isolate Memory Failures

• US 20080195902A1
• Filed: 02/12/2007
• Published: 08/14/2008
• Est. Priority Date: 02/12/2007
• Status: Active Grant

• Current Assignee: Lenovo International Limited (Lenovo Group Ltd.)
• Original Assignee: International Business Machines Corporation
• Inventors: Browne, Michael E., Astigarraga, Tara, Atherton, William Edward
• Granted Patent: US 7,661,044 B2
• Time in Patent Office: Days
• US Class Current: 714/720
• CPC Class Codes: G06F 11/1666 where the redundant component is memory or memory area
• CPC Class Codes: G11C 2029/0409 Online test
• CPC Class Codes: G11C 29/24 Accessing extra cells, e.g. dummy cells or redundant cells

Abstract

Method and system for repairing memory failure in a computer system in one aspect determines one or more test patterns and time duration for testing the new memory unit that replaced a failed memory unit. The test pattern is written to the new memory unit and read from the new memory unit. The read pattern is compared to the test pattern that was used to write. If the read test pattern and the written test pattern doe not match, a further repair action is taken. If they match, writing and reading of the test pattern repeats until the time duration for testing expires. The new memory unit may be configured as available for use when the write and read test completes successfully for the testing time duration.

Claims

1. A method for repairing memory failure in a computer system, comprising:

receiving a command that a failed memory unit has been replaced and to test the new memory unit in a memory subsystem having one or more memory units concurrently being used by a running processor;

determining a test pattern;

determining time duration for testing the new memory unit;

writing the test pattern to the new memory unit;

reading the written test pattern from the new memory unit;

comparing the test pattern read with the test pattern that was written, if the read test pattern and the written test pattern doe not match, notifying that the new memory unit is bad and if the read test pattern and the written test pattern match, determining if the time duration for testing has expired;

if the time duration has not expired, repeating the steps of writing, reading, and comparing; and

if the time duration has expired, configuring the new memory as being available for use.

2. The method of claim 1, further including;

detecting that a memory unit has failed in the memory subsystem;

relocating contents of the failed memory unit to one or more working memory units;

powering-off the failed memory unit for the failed memory unit to be replaced with a new memory unit, while allowing the running processor to continue to use the one or more working memory units.

3. The method of claim 2, wherein the step of detecting includes determining whether a threshold count for a number of recoverable errors occurring on the memory unit has exceeded.

4. The method of claim 1, wherein the test pattern is determined based on amount of memory in the new memory unit.

5. The method of claim 1, wherein a service processor performs the steps of writing, reading and comparing for testing the new memory unit while a central processing unit is performing normal operations of a computer system.

6. A system for recovering memory failure in a computer system, comprising:

a processor operable to receive a command that a failed memory unit has been replaced and to test the new memory unit in a memory subsystem of a computer system, the memory subsystem having one or more memory units, the processor further operable to determine a test pattern and determine time duration for testing the new memory unit, the processor further operable to write the test pattern to the new memory unit, read the written test pattern from the new memory unit, and compare the test pattern read with the test pattern that was written, if the read test pattern and the written test pattern do not match, the processor operable to notify that the new memory unit is bad and if the read test pattern and the written test pattern match, the processor operable to determine if the time duration for testing has expired, and if the time duration has not expired, the processor operable to repeat the steps of writing, reading, and comparing, and if the time duration has expired, the processor operable to configure the new memory as being available for use.

7. The system of claim 6, further including:

a memory controller in the memory subsystem, wherein one or more memory units in the memory subsystem generate an interrupt upon failure and the interrupt is communicated to the processor via the memory controller.

8. The system of claim 6, wherein the computer system includes a central processing unit operable to relocating contents of the failed memory unit to one or more working memory units.

9. A program storage device readable by machine, tangibly embodying a program of instructions executable by the machine to perform a method for repairing memory failure in a computer system, comprising:

receiving a command that a failed memory unit has been replaced and to test a new memory unit in a memory subsystem having one or more memory units concurrently being used by a running processor;

determining a test pattern;

determining time duration for testing the new memory unit;

writing the test pattern to the new memory unit;

reading the written test pattern from the new memory unit;

comparing the test pattern read with the test pattern that was written, if the read test pattern and the written test pattern do not match, notifying that the new memory unit is bad and if the read test pattern and the written test pattern match, determining if the time duration for testing has expired;

if the time duration has not expired, repeating the steps of writing, reading, and comparing; and

if the time duration has expired, configuring the new memory as being available for use.

10. The program storage device of claim 9, further including:

detecting that a memory unit has failed in the memory subsystem;

relocating contents of the failed memory unit to one or more working memory units;

powering-off the failed memory unit for the failed memory unit to be replaced with a new memory unit, while allowing the running processor to continue to use the one or more working memory units.

11. The program storage device of claim 9, wherein the step of detecting includes determining whether a threshold count for a number of recoverable errors occurring on the memory unit has exceeded.

12. The program storage device of claim 9, whether the test pattern is determined based on amount of memory in the new memory unit.

13. The program storage device of claim 9, wherein a service processor performs the steps of writing, reading and comparing the testing the new memory unit while a central processing unit is performing normal operations of a computer system.