Checkerboarded high-voltage vertical transistor layout
First Claim
1. A transistor comprising:
- a semiconductor die;
a plurality of transistor segments organized into a plurality of sections, the sections being arranged substantially across the semiconductor die, each section being substantially square, each transistor segment having a racetrack shape with a length and a width, each transistor segment including;
a pillar that includes an extended drain region that extends in a vertical direction through the semiconductor die;
first and second dielectric regions disposed on opposite sides of the pillar, respectively, the first dielectric region being laterally surrounded by the pillar, and the second dielectric region laterally surrounding the pillar;
first and second field plates respectively disposed in the first and second dielectric regions;
wherein a first section comprises transistor segments arranged in a side-by-side relationship with the length oriented in a first lateral direction, and a second section comprises transistor segments arranged in the side-by-side relationship with the length oriented in a second lateral direction substantially orthogonal to the first direction, the first section being disposed adjacent the second section.
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Accused Products
Abstract
In one embodiment, a transistor fabricated on a semiconductor die is arranged into sections of elongated transistor segments. The sections are arranged in rows and columns substantially across the semiconductor die. Adjacent sections in a row or a column are oriented such that the length of the transistor segments in a first one of the adjacent sections extends in a first direction, and the length of the transistor segments in a second one of the adjacent sections extends in a second direction, the first direction being substantially orthogonal to the second direction. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure.
137 Citations
29 Claims
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1. A transistor comprising:
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a semiconductor die; a plurality of transistor segments organized into a plurality of sections, the sections being arranged substantially across the semiconductor die, each section being substantially square, each transistor segment having a racetrack shape with a length and a width, each transistor segment including; a pillar that includes an extended drain region that extends in a vertical direction through the semiconductor die; first and second dielectric regions disposed on opposite sides of the pillar, respectively, the first dielectric region being laterally surrounded by the pillar, and the second dielectric region laterally surrounding the pillar; first and second field plates respectively disposed in the first and second dielectric regions; wherein a first section comprises transistor segments arranged in a side-by-side relationship with the length oriented in a first lateral direction, and a second section comprises transistor segments arranged in the side-by-side relationship with the length oriented in a second lateral direction substantially orthogonal to the first direction, the first section being disposed adjacent the second section. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A transistor comprising:
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a semiconductor die; a plurality of transistor segments organized into a plurality of sections, each transistor segment having a length and a width, the length being at least 20 times greater than the width, each transistor segment including; a pillar of a semiconductor material, the pillar including an extended drain region that extends in a vertical direction through the die; first and second dielectric regions disposed on opposite sides of the pillar, respectively, the first dielectric region being laterally surrounded by the pillar, and the second dielectric region laterally surrounding the pillar; first and second field plates respectively disposed in the first and second dielectric regions; the sections being arranged in rows and columns substantially across the semiconductor die, adjacent sections in a row or a column being oriented such that the length of the transistor segments in a first one of the adjacent sections extends in a first direction, and the length of the transistor segments in a second one of the adjacent sections extends in a second direction, the first direction being substantially orthogonal to the second direction. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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16. A semiconductor wafer comprising:
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a substrate; a plurality of die arranged on the substrate in rows and columns, each die including a transistor having a plurality of transistor segments, each transistor segment having a length that extends substantially across the die and a width, the transistor segments of each die being arranged in a side-by-side relationship along the width substantially across the die, each transistor segment including; a pillar of a semiconductor material, the pillar including a source region disposed near a top surface of the die, and an extended drain region that extends in a vertical direction through the substrate, the pillar extending in the first and second lateral directions to form a racetrack-shaped ring or oval; first and second dielectric regions disposed on opposite sides of the pillar, respectively, the first dielectric region being laterally surrounded by the pillar, and the second dielectric region laterally surrounding the pillar; first and second field plates respectively disposed in the first and second dielectric regions; adjacent die in a row or a column being oriented such that the length of the transistor segments in a first one of the adjacent die extends in a first direction and the length of the transistor segments in a second one of the adjacent die extends in a second direction, the first direction being substantially orthogonal to the second direction. - View Dependent Claims (17, 18, 19, 20, 21, 22)
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23. A transistor comprising:
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a semiconductor die; a plurality of racetrack-shaped transistor segments organized into a plurality of sections, each transistor segment having a length and a width, the length being at least 20 times greater than the width, the transistor segments of each section being arranged in a side-by-side relationship along the width, each transistor segment including; a pillar of a semiconductor material that extends in a vertical direction, the pillar having a source region disposed near a top surface of the die, an extended drain region, and a body region that vertically separates the source and extended drain regions; first and second dielectric regions disposed on opposite sides of the pillar, respectively, the first dielectric region being laterally surrounded by the pillar, and the second dielectric region laterally surrounding the pillar; first and second field plates respectively disposed in the first and second dielectric regions; the sections being arranged in rows and columns substantially across the semiconductor die, adjacent sections in a row or a column being oriented such that the length of the transistor segments in a first one of the adjacent sections extends in a first direction, and the length of the transistor segments in a second one of the adjacent sections extends in a second direction, the first direction being substantially orthogonal to the second direction. - View Dependent Claims (24, 25, 26, 27, 28, 29)
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Specification