Segmented pillar layout for a high-voltage vertical transistor
First Claim
1. An apparatus comprising:
- a plurality of transistor segments arranged on a die, each transistor segment having a racetrack shape with a length elongated in a first lateral direction and a width in a second lateral direction, each transistor segment including;
a pillar of a semiconductor material, the pillar including an extended drain region that extends in a vertical direction through the die;
a first and second dielectric regions disposed on opposite sides of the pillar, respectively, the first dielectric region being laterally surrounded by the pillar, and the second dielectric region laterally surrounding the pillar;
first and second field plates respectively disposed in the first and second dielectric regions;
wherein the transistor segments are arranged into a plurality of sections, a first section comprising a first row of transistor segments arranged in a side-by-side relationship in the second lateral direction, and a second section comprising a second row of transistor segments arranged in the side-by-side relationship in the second lateral direction.
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Accused Products
Abstract
In one embodiment, a transistor fabricated on a semiconductor die includes a first section of transistor segments disposed in a first area of the semiconductor die, and a second section of transistor segments disposed in a second area of the semiconductor die adjacent the first area. Each of the transistor segments in the first and second sections includes a pillar of a semiconductor material that extends in a vertical direction. First and second dielectric regions are disposed on opposite sides of the pillar. First and second field plates are respectively disposed in the first and second dielectric regions. Outer field plates of transistor segments adjoining first and second sections are either separated or partially merged. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure.
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Citations
36 Claims
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1. An apparatus comprising:
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a plurality of transistor segments arranged on a die, each transistor segment having a racetrack shape with a length elongated in a first lateral direction and a width in a second lateral direction, each transistor segment including; a pillar of a semiconductor material, the pillar including an extended drain region that extends in a vertical direction through the die; a first and second dielectric regions disposed on opposite sides of the pillar, respectively, the first dielectric region being laterally surrounded by the pillar, and the second dielectric region laterally surrounding the pillar; first and second field plates respectively disposed in the first and second dielectric regions; wherein the transistor segments are arranged into a plurality of sections, a first section comprising a first row of transistor segments arranged in a side-by-side relationship in the second lateral direction, and a second section comprising a second row of transistor segments arranged in the side-by-side relationship in the second lateral direction. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. An apparatus comprising:
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a plurality of transistor segments arranged on a die, each transistor segment having a racetrack shape with a length elongated in a first lateral direction and a width in a second lateral direction, each transistor segment including; a pillar of a semiconductor material, the pillar including an extended drain region that extends in a vertical direction through the die; a first and second dielectric regions disposed on opposite sides of the pillar, respectively, the first dielectric region being laterally surrounded by the pillar, and the second dielectric region laterally surrounding the pillar; first and second field plates respectively disposed in the first and second dielectric regions; wherein the transistor segments are arranged into a plurality of sections, transistor segments of a first section being shifted in the first lateral direction with respect to transistor segments of a second section, with each of the transistor segments of a row of the first section being separated by a pair of the transistor segments of the second section, the pair being arranged in an end-to-end relationship in the first lateral direction, the second dielectric regions of alternating ones of the transistor segments in the first and second sections being merged. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22)
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23. A transistor comprising:
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a semiconductor die; a plurality of transistor segments arranged to substantially cover the semiconductor die, each transistor segment having a length that extends in a first lateral direction and a width that extends in a second lateral direction, the length being at least 20 times greater than the width, each transistor segment including; a pillar of a semiconductor material, the pillar including an extended drain region that extends in a vertical direction through the semiconductor die, the pillar extending in the first and second lateral directions to form a continuous racetrack-shaped ring or oval; first and second dielectric regions disposed on opposite sides of the pillar, respectively, the first dielectric region being laterally surrounded by the pillar, and the second dielectric region laterally surrounding the pillar; first and second field plates respectively disposed in the first and second dielectric regions; and wherein the transistor segments are arranged into two or more sections located in corresponding areas of the semiconductor die. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30)
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31. A transistor fabricated on a semiconductor die, comprising:
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a first section of transistor segments disposed in a first area of the semiconductor die; a second section of transistor segments disposed in a second area of the semiconductor die adjacent the first area, each of the transistor segments in the first and second sections including; a pillar of a semiconductor material that extends in a vertical direction, the pillar having a source region disposed near a top surface of the die, and an extended drain region disposed beneath the source region, the pillar extending in the first and second lateral directions to form a continuous racetrack-shaped ring or oval; first and second dielectric regions disposed on opposite sides of the pillar, respectively, the first dielectric region being laterally surrounded by the pillar, and the second dielectric region laterally surrounding the pillar; first and second field plates respectively disposed in the first and second dielectric regions; and wherein the second field plates of pairs of adjacent transistor segments of the first and second sections are either respectively separated or partially merged. - View Dependent Claims (32, 33, 34, 35, 36)
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Specification