Distortion Estimation And Cancellation In Memory Devices
First Claim
1. A method for operating a memory, comprising:
- storing data in a group of analog memory cells of the memory as respective first voltage levels, selected from a set of possible values;
after storing the data, reading from the analog memory cells respective second voltage levels, which are affected by cross-coupling interference causing the second voltage levels to differ from the respective first voltage levels;
processing the second voltage levels to derive respective hard decisions, each corresponding to a respective value among the possible values of the first voltage levels;
estimating cross-coupling coefficients, which quantify the cross-coupling interference among the analog memory cells, based on the second voltage levels and the respective hard decisions; and
reconstructing the data stored in the group of analog memory cells from the read second voltage levels using the estimated cross-coupling coefficients.
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Accused Products
Abstract
A method for operating a memory (28) includes storing data in a group of analog memory cells (32) of the memory as respective first voltage levels. After storing the data, second voltage levels are read from the respective analog memory cells. The second voltage levels are affected by cross-coupling interference causing the second voltage levels to differ from the respective first voltage levels. Cross-coupling coefficients, which quantify the cross-coupling interference among the analog memory cells, are estimated by processing the second voltage levels. The data stored in the group of analog memory cells is reconstructed from the read second voltage levels using the estimated cross-coupling coefficients.
351 Citations
86 Claims
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1. A method for operating a memory, comprising:
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storing data in a group of analog memory cells of the memory as respective first voltage levels, selected from a set of possible values; after storing the data, reading from the analog memory cells respective second voltage levels, which are affected by cross-coupling interference causing the second voltage levels to differ from the respective first voltage levels; processing the second voltage levels to derive respective hard decisions, each corresponding to a respective value among the possible values of the first voltage levels; estimating cross-coupling coefficients, which quantify the cross-coupling interference among the analog memory cells, based on the second voltage levels and the respective hard decisions; and reconstructing the data stored in the group of analog memory cells from the read second voltage levels using the estimated cross-coupling coefficients. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method for operating a memory, comprising:
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storing data as respective first voltage levels in analog memory cells of the memory, in which a subset of the memory cells has correlative distortion; after storing the data, reading from one or more of the analog memory cells in the subset respective second voltage levels, which differ from the first voltage levels due to the correlative distortion; processing the second voltage levels read from the one or more of the analog memory cells in order to estimate respective distortion levels in the second voltage levels; reading a second voltage level from another analog memory cell in the subset; predicting a distortion level in the second voltage level read from the other analog memory cell based on the estimated respective distortion levels of the one or more of the analog memory cells in the subset; correcting the second voltage level read from the other memory cell using the predicted distortion level; and reconstructing the data stored in the other memory cell based on the corrected second voltage level. - View Dependent Claims (11, 12, 13)
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14. A method for operating a memory, comprising:
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storing data as respective first voltage levels in a group of analog memory cells of the memory; performing a memory access operation on a first analog memory cell in the memory; responsively to performing the memory access operation, reading a second voltage level from a second analog memory cell in the memory; processing the second voltage level so as to estimate a level of disturbance in the second voltage level that was caused by performing the memory access operation on the first analog memory cell; correcting the second voltage level using the estimated level of the disturbance; and reconstructing the data stored in the second analog memory cell based on the corrected second voltage level. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22)
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23. A method for operating a memory, comprising:
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storing data as respective first voltage levels in a group of analog memory cells of the memory; after storing the data, reading from the analog memory cells respective second voltage levels, at least some of which differ from the respective first voltage levels; identifying a subset of the analog memory cells that potentially cause distortions to a second voltage level read from a target analog memory cell; classifying the analog memory cells in the subset into multiple classes based on a relation between respective times at which the data was stored in the analog memory cells and a time at which the data was stored in the target analog memory cell; estimating, for each of the classes, a respective distortion caused to the second voltage level in the target memory cell by the analog memory cells in the class; correcting the second voltage level read from the target analog memory cell using the estimated respective distortion for each of one or more of the classes; and reconstructing the data stored in the target analog memory cell based on the corrected second voltage level. - View Dependent Claims (24, 25, 26, 27, 28, 29)
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30. A method for operating a memory, comprising:
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accepting data for storage in the memory; determining respective first voltage levels for programming a group of analog memory cells of the memory so as to cause the analog memory cells to store respective values of a physical quantity that represent the data; programming the analog memory cells in the group using the determined first voltage levels; after programming the analog memory cells, reading second voltage levels from the respective analog memory cells and reconstructing the data from the second voltage levels. - View Dependent Claims (31, 32, 33, 34)
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35. A method for operating a memory, comprising:
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storing data as respective first voltage levels in a group of analog memory cells of the memory; after storing the data, reading from the analog memory cells in the group second voltage levels, at least some of which differ from the respective first voltage levels; estimating a distortion level in the second voltage levels read from the analog memory cells; and when the estimated distortion level violates a predetermined distortion criterion, re-programming the data into the analog memory cells of the memory. - View Dependent Claims (36)
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37. A method for operating a memory, comprising:
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storing data as respective first voltage levels in a group of analog memory cells of the memory; after storing the data, reading from the analog memory cells respective second voltage levels, at least some of which differ from the respective first voltage levels; identifying a subset of the analog memory cells that potentially cause distortions to a second voltage level read from a target analog memory cell; estimating a difference between a first distortion level caused by the memory cells in the subset to the target memory cell at a first time instant in which the target memory cell was programmed and a second distortion level caused by the memory cells in the subset to the target memory cell at a second time instant in which the target memory cell was read; and correcting the second voltage level read from the target memory cell using the estimated difference.
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38. A method for operating a memory, comprising:
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storing data in a group of analog memory cells of the memory as respective first voltage levels; after storing the data, reading from the analog memory cells respective second voltage levels, which are affected by cross-coupling interference causing the second voltage levels to differ from the respective first voltage levels; estimating cross-coupling coefficients, which quantify the cross-coupling interference among the analog memory cells by processing the second voltage levels; and reconstructing the data stored in the group of analog memory cells from the read second voltage levels using the estimated cross-coupling coefficients. - View Dependent Claims (39)
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40. A data storage apparatus, comprising:
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an interface, which is operative to communicate with a memory that includes a plurality of analog memory cells; and a memory signal processor (MSP), which is coupled to the interface and is arranged to store data in a group of the analog memory cells as respective first voltage levels selected from a set of possible values, to read from the analog memory cells, after storing the data, respective second voltage levels, which are affected by cross-coupling interference causing the second voltage levels to differ from the respective first voltage levels, to process the second voltage levels to derive respective hard decisions, each corresponding to a respective value among the possible values of the first voltage levels, to estimate cross-coupling coefficients, which quantify the cross-coupling interference among the analog memory cells, based on the second voltage levels and the respective hard decisions, and to reconstruct the data stored in the group of analog memory cells from the second voltage levels using the estimated cross-coupling coefficients. - View Dependent Claims (41, 42, 43, 44, 45, 46, 47, 48)
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49. A data storage apparatus, comprising:
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an interface, which is operative to communicate with a memory that includes multiple analog memory cells, of which a subset of the memory cells has correlative distortion; and a memory signal processor (MSP), which is coupled to the interface and is arranged to store data as respective first voltage levels in the analog memory cells, to read from one or more of the analog memory cells in the subset, after storing the data, respective second voltage levels, which differ from the first voltage levels due to the correlative distortion, to process the second voltage levels read from the one or more of the analog memory cells in order to estimate respective distortion levels in the second voltage levels, to read a second voltage level from another analog memory cell in the subset, to predict a distortion level in the second voltage level read from the other analog memory cell based on the estimated respective distortion levels of the one or more of the analog memory cells in the subset, to correct the second voltage level read from the other memory cell using the predicted distortion level, and to reconstruct the data stored in the other memory cell based on the corrected second voltage level. - View Dependent Claims (50, 51, 52)
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53. A data storage apparatus, comprising:
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an interface, which is operative to communicate with a memory that includes a plurality of analog memory cells; and a memory signal processor (MSP), which is coupled to the interface and is arranged to store data as respective first voltage levels in a group of the analog memory cells, to perform a memory access operation on a first analog memory cell in the memory, to read, responsively to performing the memory access operation, a second voltage level from a second analog memory cell in the memory, to process the second voltage level so as to estimate a level of disturbance in the second voltage level that was caused by performing the memory access operation on the first analog memory cell, to correct the second voltage level using the estimated level of the disturbance, and to reconstruct the data stored in the second analog memory cell based on the corrected second voltage level. - View Dependent Claims (54, 55, 56, 57, 58, 59, 60, 61)
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62. A data storage apparatus, comprising:
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an interface, which is operative to communicate with a memory that includes a plurality of analog memory cells; and a memory signal processor (MSP), which is coupled to the interface and is arranged to store data as respective first voltage levels in a group of the analog memory cells, to read from the analog memory cells, after storing the data, respective second voltage levels, at least some of which differ from the respective first voltage levels, to identify a subset of the analog memory cells that potentially cause distortions to a second voltage level read from a target analog memory cell, to classify the analog memory cells in the subset into multiple classes based on a relation between respective times at which the data was stored in the analog memory cells and a time at which the data was stored in the target analog memory cell, to estimate, for each of the classes, a respective distortion caused to the second voltage level in the target memory cell by the analog memory cells in the class, to correct the second voltage level read from the target analog memory cell using the estimated respective distortion for each of one or more of the classes, and to reconstruct the data stored in the target analog memory cell based on the corrected second voltage level. - View Dependent Claims (63, 64, 65, 66, 67, 68)
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69. A data storage apparatus, comprising:
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an interface, which is operative to communicate with a memory that includes a plurality of analog memory cells; and a memory signal processor (MSP), which is coupled to the interface and is arranged to accept data for storage in the memory, to determine respective first voltage levels for programming a group of the analog memory cells so as to cause the analog memory cells to store respective values of a physical quantity that represent the data, to program the analog memory cells in the group using the first voltage levels, to read, after programming the analog memory cells, second voltage levels from the respective analog memory cells, and to reconstruct the data from the second voltage levels. - View Dependent Claims (70, 71, 72, 73)
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74. A data storage apparatus, comprising:
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an interface, which is operative to communicate with a memory that includes a plurality of analog memory cells; and a memory signal processor (MSP), which is coupled to the interface and is arranged to store data as respective first voltage levels in a group of the analog memory cells, to read from the analog memory cells in the group, after storing the data, second voltage levels, at least some of which differ from the respective first voltage levels, to estimate a distortion level in the second voltage levels read from the analog memory cells, and, when the estimated distortion level violates a predetermined distortion criterion, to re-program the data into the analog memory cells in the group. - View Dependent Claims (75)
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76. A data storage apparatus, comprising:
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an interface, which is operative to communicate with a memory that includes a plurality of analog memory cells; and a memory signal processor (MSP), which is coupled to the interface and is arranged to store data as respective first voltage levels in a group of the analog memory cells of the memory, to read from the analog memory cells, after storing the data, respective second voltage levels, at least some of which differ from the respective first voltage levels, to identify a subset of the analog memory cells that potentially cause distortions to a second voltage level read from a target analog memory cell, to estimate a difference between a first distortion level caused by the memory cells in the subset to the target memory cell at a first time instant in which the target memory cell was programmed and a second distortion level caused by the memory cells in the subset to the target memory cell at a second time instant in which the target memory cell was read, and to correct the second voltage level read from the target memory cell using the estimated difference.
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77. A data storage apparatus, comprising:
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an interface, which is operative to communicate with a memory that includes a plurality of analog memory cells; and a memory signal processor (MSP), which is coupled to the interface and is arranged to store data in a group of the analog memory cells of the memory as respective first voltage levels, to read from the analog memory cells, after storing the data, respective second voltage levels, which are affected by cross-coupling interference causing the second voltage levels to differ from the respective first voltage levels, to estimate cross-coupling coefficients, which quantify the cross-coupling interference among the analog memory cells by processing the second voltage levels, and to reconstruct the data stored in the group of analog memory cells from the read second voltage levels using the estimated cross-coupling coefficients. - View Dependent Claims (78)
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79. A data storage apparatus, comprising:
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a memory, which comprises a plurality of analog memory cells; and a memory signal processor (MSP), which is coupled to the memory and is arranged to store data in a group of the analog memory cells as respective first voltage levels selected from a set of possible values, to read from the analog memory cells, after storing the data, respective second voltage levels, which are affected by cross-coupling interference causing the second voltage levels to differ from the respective first voltage levels, to process the second voltage levels to derive respective hard decisions, each corresponding to a respective value among the possible values of the first voltage levels, to estimate cross-coupling coefficients, which quantify the cross-coupling interference among the analog memory cells, based on the second voltage levels and the respective hard decisions, and to reconstruct the data stored in the group of analog memory cells from the second voltage levels using the cross-coupling coefficients.
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80. A data storage apparatus, comprising:
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a memory, which comprises multiple analog memory cells, of which a subset of the memory cells has correlative distortion; and a memory signal processor (MSP), which is coupled to the memory and is arranged to store data as respective first voltage levels in a group of the analog memory cells, to read from one or more of the analog memory cells in a column of the array, after storing the data, respective second voltage levels, which differ from the first voltage levels due to a distortion, to process the second voltage levels read from the one or more of the analog memory cells in order to estimate respective distortion levels in the second voltage levels, to read a second voltage level from another analog memory cell in the column, to predict a distortion level in the second voltage level read from the other analog memory cell based on the estimated respective distortion levels of the one or more of the analog memory cells in the column, to correct the second voltage level read from the other memory cell using the predicted distortion level, and to reconstruct the data stored in the other memory cell based on the corrected second voltage level.
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81. A data storage apparatus, comprising:
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a memory, which comprises a plurality of analog memory cells; and a memory signal processor (MSP), which is coupled to the memory and is arranged to store data as respective first voltage levels in a group of the analog memory cells, to perform a memory access operation on a first analog memory cell in the memory, to read, responsively to performing the memory access operation, a second voltage level from a second analog memory cell in the memory, to process the second voltage level so as to estimate a level of disturbance in the second voltage level that was caused by performing the memory access operation on the first analog memory cell, to correct the second voltage level using the estimated level of the disturbance, and to reconstruct the data stored in the second analog memory cell based on the corrected second voltage level.
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82. A data storage apparatus, comprising:
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a memory, which comprises a plurality of analog memory cells; and a memory signal processor (MSP), which is coupled to the memory and is arranged to store data as respective first voltage levels in a group of the analog memory cells, to read from the analog memory cells, after storing the data, respective second voltage levels, at least some of which differ from the respective first voltage levels, to identify a subset of the analog memory cells that potentially cause distortions to a second voltage level read from a target analog memory cell, to classify the analog memory cells in the subset into multiple classes based on a relation between respective times at which the data was stored in the analog memory cells and a time at which the data was stored in the target analog memory cell, to estimate, for each of the classes, a respective distortion caused to the second voltage level in the target memory cell by the analog memory cells in the class, to correct the second voltage level read from the target analog memory cell using the estimated respective distortion for each of one or more of the classes, and to reconstruct the data stored in the target analog memory cell based on the corrected second voltage level.
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83. A data storage apparatus, comprising:
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a memory, which comprises a plurality of analog memory cells; and a memory signal processor (MSP), which is coupled to the memory and is arranged to accept data for storage in the memory, to determine respective first voltage levels for programming a group of the analog memory cells so as to cause the analog memory cells to store respective values of a physical quantity that represent the data, to program the analog memory cells in the group using the first voltage levels, to read, after programming the analog memory cells, second voltage levels from the respective analog memory cells, and to reconstruct the data from the second voltage levels.
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84. A data storage apparatus, comprising:
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a memory, which comprises a plurality of analog memory cells; and a memory signal processor (MSP), which is coupled to the memory and is arranged to store data as respective first voltage levels in a group of the analog memory cells, to read from the analog memory cells in the group, after storing the data, second voltage levels, at least some of which differ from the respective first voltage levels, to estimate a distortion level in the second voltage levels read from the analog memory cells, and, when the estimated distortion level violates a predetermined distortion criterion, to re-program the data into the analog memory cells in the group.
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85. A data storage apparatus, comprising:
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a memory, which comprises a plurality of analog memory cells; and a memory signal processor (MSP), which is coupled to the memory and is arranged to store data as respective first voltage levels in a group of the analog memory cells of the memory, to read from the analog memory cells, after storing the data, respective second voltage levels, at least some of which differ from the respective first voltage levels, to identify a subset of the analog memory cells that potentially cause distortions to a second voltage level read from a target analog memory cell, to estimate a difference between a first distortion level caused by the memory cells in the subset to the target memory cell at a first time instant in which the target memory cell was programmed and a second distortion level caused by the memory cells in the subset to the target memory cell at a second time instant in which the target memory cell was read, and to correct the second voltage level read from the target memory cell using the estimated difference.
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86. A data storage apparatus, comprising:
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a memory, which comprises a plurality of analog memory cells; and a memory signal processor (MSP), which is coupled to the memory and is arranged to store data in a group of the analog memory cells of the memory as respective first voltage levels, to read from the analog memory cells, after storing the data, respective second voltage levels, which are affected by cross-coupling interference causing the second voltage levels to differ from the respective first voltage levels, to estimate cross-coupling coefficients, which quantify the cross-coupling interference among the analog memory cells by processing the second voltage levels, and to reconstruct the data stored in the group of analog memory cells from the read second voltage levels using the estimated cross-coupling coefficients.
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Specification