VICINAL GALLIUM NITRIDE SUBSTRATE FOR HIGH QUALITY HOMOEPITAXY

• US 20080199649A1
• Filed: 04/14/2008
• Published: 08/21/2008
• Est. Priority Date: 11/14/2003
• Status: Active Grant

• Current Assignee: Wolfspeed, Inc.
• Original Assignee: CREE Incorporated (Wolfspeed, Inc.)
• Inventors: Brandes, George R., Xu, Xueping, Vaudo, Robert P., Flynn, Jeffrey S.
• Granted Patent: US 7,700,203 B2
• Time in Patent Office: Days
• US Class Current: 428/80
• CPC Class Codes: C30B 25/18 characterised by the substrate
• CPC Class Codes: C30B 29/403 AIII-nitrides
• CPC Class Codes: C30B 29/406 Gallium nitride
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: Y10T 428/31 Surface property or characteristic of web, sheet or block
• CPC Class Codes: Y10T 83/0524 Plural cutting steps

Abstract

A III-V nitride, e.g., GaN, substrate including a (0001) surface offcut from the <0001> direction predominantly toward a direction selected from the group consisting of <10-10> and <11-20> directions, at an offcut angle in a range that is from about 0.2 to about 10 degrees, wherein the surface has a RMS roughness measured by 50×50 μm² AFM scan that is less than 1 nm, and a dislocation density that is less than 3E6 cm⁻². The substrate may be formed by offcut slicing of a corresponding boule or wafer blank, by offcut lapping or growth of the substrate body on a corresponding vicinal heteroepitaxial substrate, e.g., of offcut sapphire. The substrate is usefully employed for homoepitaxial deposition in the fabrication of III-V nitride-based microelectronic and opto-electronic devices.

Claims

1. An (Al,In,Ga)N substrate including a (Al,In,Ga)N (0001) surface offcut from the [0001] direction at a non-zero angle, and a (Al,In,Ga)N (000 1) surface offcut from the [000 1] direction at a non-zero angle.

2. The (Al,In,Ga)N substrate of claim 1, wherein the (Al,In,Ga)N (0001) surface is offcut from the [0001] direction predominantly towards a direction selected from the group consisting of <

10 10> and

<

11 20>

directions.

3. The (Al,In,Ga)N substrate of claim 1, wherein the (Al,In,Ga)N (0001) surface is offcut predominantly toward the <

10 10>

direction.

4. The (Al,In,Ga)N substrate of claim 1, wherein the (Al,In,Ga)N (0001) surface is offcut predominantly toward the <

11 20>

direction.

5. The (Al,In,Ga)N substrate of claim 1, wherein the offcut (Al,In,Ga)N (0001) surface is offcut from the [0001] direction at an offcut angle in a range from about 0.2 to about 10 degrees, and wherein the (Al,In,Ga)N (000 1) surface is offcut from the [0001] direction at an offcut angle in a range from about 0.2 to about 10 degrees.

6. The (Al,In,Ga)N substrate of claim 1, wherein each of the offcut (Al,In,Ga)N (0001) surface and the offcut (Al,In,Ga)N (000 1) surface has the same magnitude offcut.

7. The (Al,In,Ga)N substrate of claim 1, wherein the offcut (Al,In,Ga)N (0001) surface is parallel to the offcut (Al,In,Ga)N (000 1) surface.

8. The (Al,In,Ga)N substrate of claim 1, wherein the offcut (Al,In,Ga)N (0001) surface has a RMS roughness measured by 50×

50 μ

m² AFM scan that is less than 0.9 nm.

9. The (Al,In,Ga)N substrate of claim 1, wherein the offcut (Al,In,Ga)N (0001) surface has a dislocation density that is less than 1E6 cm⁻

2.

10. The (Al,In,Ga)N substrate of claim 1, wherein the offcut (Al,In,Ga)N (0001) surface has a dislocation density that is less than 5E5 cm⁻

2.

11. The (Al,In,Ga)N substrate of claim 1, wherein the offcut (Al,In,Ga)N (0001) surface has a RMS roughness measured by 50×

50 μ

m² AFM scan that is less than 1 nm, and a dislocation density that is less than 3E6 cm<sup>−

2</sup>.

12. The (Al,In,Ga)N substrate of claim 1, wherein the (Al,In,Ga)N (0001) surface is offcut from the [0001] direction predominantly towards a direction selected from the group consisting of <

10 10> and

<

11 10>

directions, at an offcut angle of from about 2.5 to about 10 degrees, wherein said offcut (Al,In,Ga)N (0001) surface has a RMS roughness measured by 50×

50 μ

m² AFM scan that is less than 1 nm, and a dislocation density that is less than 3E6 cm<sup>−

2</sup>.

13. A microelectronic or opto-electronic device article, comprising the (Al,In,Ga)N substrate of claim 1, and a microelectronic or opto-electronic device structure including a homoepitaxial (Al,In,Ga)N layer deposited on said surface.

14. An (Al,In,Ga)N substrate including a (Al,In,Ga)N (0001) surface offcut from the [0001] direction at an angle in a range from about 0.2 to about 10 degrees, and including a (Al,In,Ga)N (000 1) surface offcut from the [000 1] direction at an angle in a range from about 0.2 to about 10 degrees, wherein the (Al,In,Ga)N (0001) surface is offcut from the <

0001>

direction predominantly towards a direction selected from the group consisting of <

10 10> and

<

11 10>

directions.

15. The (Al,In,Ga)N substrate of claim 14, wherein said offcut (Al,In,Ga)N (0001) surface has a RMS roughness measured by 50×

50 μ

m² AFM scan that is less than 1 nm, and a dislocation density that is less than 3E6 cm<sup>−

2</sup>.

16. The (Al,In,Ga)N substrate of claim 14, wherein the offcut (Al,In,Ga)N (0001) surface is parallel to the offcut (Al,In,Ga)N (000 1) surface.

17. The (Al,In,Ga)N substrate of claim 14, wherein the offcut (Al,In,Ga)N (0001) surface has the same magnitude offcut as the offcut (Al,In,Ga)N (000 1) surface.

18. A microelectronic or opto-electronic device article, comprising the (Al,In,Ga)N substrate of claim 14, and a microelectronic or opto-electronic device structure including a homoepitaxial (Al,In,Ga)N layer deposited on said surface.

19. A method comprising:

surface processing a (Al,In,Ga)N wafer along a first side thereof produce a (Al,In,Ga)N wafer having a wedge conformation; and

surface processing the (Al,In,Ga)N wafer having a wedge conformation along a second side thereof to alter the wedge conformation;

wherein, following the first and second surface processing steps, the first side of the (Al,In,Ga)N wafer is tilted away from the (Al,In,Ga)N lattice c-plane, and the second side of the (Al,In,Ga)N wafer is tilted away from the (Al,In,Ga)N lattice c-plane.

20. The method of claim 19, wherein following the first and second lapping steps, any of the following conditions are satisfied:

the first side of the (Al,In,Ga)N wafer is parallel to the second side of the (Al,In,Ga)N wafer; and

each of the offcut (Al,In,Ga)N (0001) surface and the offcut (Al,In,Ga)N (000 1) surface has the same magnitude offcut.