CMOS IMAGE SENSORS INCLUDING BACKSIDE ILLUMINATION STRUCTURE AND METHOD OF MANUFACTURING IMAGE SENSOR

• US 20080203452A1
• Filed: 02/26/2008
• Published: 08/28/2008
• Est. Priority Date: 02/26/2007
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Moon, Chang-Rok, Lee, Duck-hyung, Cho, Seong-ho
• Granted Patent: US 8,164,126 B2
• Time in Patent Office: Days
• US Class Current: 257/292
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/14621 Colour filter arrangements
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures

Abstract

An image sensor having a backside illumination structure can include a photo diode unit in a first wafer, where the photo diode unit includes photo diodes and transfer gate transistors coupled to respective ones of the photo diodes. A wiring line unit can be included on a second wafer that is bonded to the photo diode unit, where the wiring line unit includes wiring lines and transistors configured to process signals provided by the photo diode unit and configured to control the photo diode unit. A supporting substrate is bonded to the wiring line unit and a filter unit is located under the first wafer.

Claims

1. An image sensor having a backside illumination structure, comprising:

a photo diode unit in a first wafer, the photo diode unit comprising photo diodes and transfer gate transistors coupled to respective ones of the photo diodes;

a wiring line unit on a second wafer bonded to the photo diode unit comprising wiring lines and transistors configured to process signals provided by the photo diode unit and configured to control the photo diode unit;

a supporting substrate bonded to the wiring line unit; and

a filter unit formed under the first wafer.

2. The image sensor of claim 1, wherein the second wafer is implanted with hydrogen ions, and the wiring line unit includes the transistors on a region that remains after a predetermined portion of the second wafer is removed by smart-cutting.

3. The image sensor of claim 2, wherein the second wafer is bonded to the photo diode unit by being closely stacked thereon and annealed.

4. The image sensor of claim 1, wherein the photo diode unit includes floating diffusion regions respectively formed adjacent to the photo diodes, and an insulating layer formed on the entire first wafer covering the transfer gate transistors.

5. The image sensor of claim 1, wherein the transistors comprise a source follower transistor, a selection transistor, and/or a reset transistor.

6. The image sensor of claim 1, wherein one transistor (1 Tr/pixel) is formed for one photo diode in the photo diode unit.

7. The image sensor of claim 1, wherein the first wafer has a thickness of about 10 μ

m or less.

8. The image sensor of claim 1, wherein the filter unit includes filter arrays configured to transmit light having wavelengths corresponding respective predetermined ones of the filter arrays and micro-lenses for focusing light onto the filter arrays, wherein light transmitted through the filter unit is directly incident on the photo diodes.

9. The image sensor of claim 8, wherein the wiring line unit is positioned above the photo diodes and opposite filter unit.

10. A method of manufacturing an image sensor having a backside illumination structure, the method comprising:

forming a photo diode unit comprising photo diodes, and transfer gate transistors, which respectively correspond to the photo diodes, in a first wafer;

bonding the photo diode unit on a second wafer and forming a wiring line unit including transistors, for signal processing and controlling, and wiring lines on the second wafer;

bonding a supporting substrate on the wiring line unit; and

forming a filter unit below the first wafer.

11. The method of claim 10, wherein the forming of the photo diode unit comprises:

forming photo diodes in the first wafer;

forming floating diffusion regions respectively in the first wafer adjacent to the photo diodes;

forming the transfer gate transistors respectively on the photo diodes; and

forming an insulating layer on the entire surface of the first wafer covering the transfer gate transistors.

12. The method of claim 10, wherein the second wafer is implanted with hydrogen ions, and the bonding of the second wafer to the photo diode unit and the forming of the wiring line unit comprises:

bonding a top surface of the second wafer that is implanted with hydrogen ions to the photo diode unit;

removing a predetermined portion of the second wafer by smart-cutting;

forming transistors, for signal processing and controlling, on the remaining second wafer; and

performing a back end of line (BEOL) process on the transistors that are used for signal processing and controlling.

13. The method of claim 12, wherein each of the transistors, for signal processing and controlling, includes at least one of a source follower transistor, a selection transistor, and a reset transistor.

14. The method of claim 10, further comprising polishing a rear surface of the first wafer in order for the first wafer to be thin before forming a filter unit below the first wafer.

15. The method of claim 14, wherein the first wafer has a thickness of 10 μ

m or less due to the polishing.

16. The method of claim 10, wherein the forming of the filter unit comprises:

forming filter arrays below the first wafer, which transmit light according to the wavelength of light; and

forming micro-lenses for focusing light under the filter array.

17. The method of claim 10, wherein one transistor (1 Tr/pixel) is formed for one photo diode in the photo diode unit in the image sensor.

18. A CMOS image sensor circuit comprising:

a photo diode unit comprising photo diodes and transfer gate transistors coupled to respective ones of the photo diodes and configured to be positioned in an incident light path;

a micro-lens and filter unit upstream in the incident light path from the photo diode unit; and

a wiring line unit positioned downstream in the incident light path from the photo diode unit, the wiring line unit comprising wiring lines and transistors configured to processing signals provided by the photo diode unit.

19. A CMOS image sensor circuit according to the claim 18 wherein the wiring line unit is positioned on a first side of the photo diode unit and the micro-lens and filter unit is positioned on a second side of the photo diode unit that is opposite the first side.

20. A CMOS image sensor circuit according to the claim 18 wherein a single pass transistor is included for a corresponding single one of the photo diodes in the photo diode unit.