Voltage generating circuit having charge pump and liquid crystal display using same

• US 20080204121A1
• Filed: 02/28/2008
• Published: 08/28/2008
• Est. Priority Date: 02/28/2007
• Status: Abandoned Application

• Current Assignee: InnoLux Corporation
• Original Assignee: Innocom Technology Limited, Innolux Display Corporation (InnoLux Corporation)
• Inventors: Huang, Shun-Ming, Tung, Chien-Fan
• Application Number:
  US12/072,837
• Publication Number:
  US 20080204121A1
• Time in Patent Office: Days
• US Class Current: 327/536
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general
• CPC Class Codes: G09G 3/3655 Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors

Abstract

An exemplary voltage generating circuit (34) includes a first pulse generator (341) configured to provide a first pulse signal having a fixed duty ratio, a second pulse generator (342) configured to provide a second pulse signal having a variable duty ratio, and a charge pump (343) electrically coupled to the first pulse generator and the second pulse generator. The charge pump outputs a voltage signal according to the first and second pulse signals. When the voltage signal is adjusted, the duty ratio of the second pulse signal is modulated by the second pulse generator, such that the voltage signal outputted by the charge bump is adjusted to have a corresponding value. A liquid crystal display (300) using the voltage generating circuit is also provided in the present invention.

Claims

1. A voltage generating circuit, comprising:

a first pulse generator configured to provide a first pulse signal having a fixed duty ratio;

a second pulse generator configured to provide a second pulse signal having a variable duty ratio; and

a charge pump electrically coupled to the first pulse generator and the second pulse generator;

wherein the charge pump outputs a voltage signal according to the first and second pulse signals, when the voltage signal is adjusted, the duty ratio of the second pulse signal is modulated by the second pulse generator, such that the voltage signal outputted by the charge bump is adjusted to have a corresponding value.

2. The voltage generating circuit as claimed in claim 1, wherein the second pulse generator is a pulse width modulation circuit.

3. The voltage generating circuit as claimed in claim 1, wherein a resolution of the second pulse generator is variable.

4. The voltage generating circuit as claimed in claim 3, wherein the resolution of the second pulse generator is 7 bits.

5. The voltage generating circuit as claimed in claim 1, wherein the charge bump comprises a first input terminal configured to receive the first pulse signal, a second input terminal configured to receive the second pulse signal, and an output terminal configured to output the voltage signal.

6. The voltage generating circuit as claimed in claim 5, wherein the charge bump further comprises a first capacitor, a first diode, and a second diode, a negative terminal of the first diode is electrically coupled to the first input terminal via the first capacitor, a positive terminal of the first diode is electrically coupled to the second input terminal, a positive terminal of the second diode is electrically coupled to the negative terminal of the first diode, and a negative terminal of the second diode is electrically coupled to the output terminal.

7. The voltage generating circuit as claimed in claim 6, wherein the charge bump further comprises a second capacitor, the positive terminal of the first diode is grounded via the second capacitor.

8. The voltage generating circuit as claimed in claim 7, wherein the charge bump further comprises a third capacitor, the negative terminal of the second diode is grounded via the third capacitor.

9. A liquid crystal display, comprising:

a liquid crystal panel comprising a plurality of pixels; and

a voltage generating circuit configured to provide a common voltage signal for the pixels, the voltage generating circuit comprising a first pulse generator, a second generator, and a charge pump;

wherein the charge pump receives a first pulse signal having a fixed duty ratio from the first pulse generator, and receives a second pulse signal having a variable duty ratio from the second pulse generator, and then outputs a common voltage signal to the pixels according to the first and second pulse signals, a value of the common voltage signal is adjusted when the duty ratio of the second pulse signal is modulated.

10. The liquid crystal display as claimed in claim 9, wherein the second pulse generator is a pulse width modulation circuit.

11. The liquid crystal display as claimed in claim 9, wherein a resolution of the second pulse generator is variable.

12. The liquid crystal display as claimed in claim 11, wherein the resolution of the second pulse generator is 7 bits.

13. The liquid crystal display as claimed in claim 9, wherein the charge bump comprises a first input terminal configured to receive the first pulse signal, a second input terminal configured to receive the second pulse signal, and an output terminal configured to output the common voltage signal.

14. The liquid crystal display as claimed in claim 13, wherein the charge bump further comprises a first capacitor, a first diode, and a second diode, a negative terminal of the first diode is electrically coupled to the first input terminal via the first capacitor, a positive terminal of the first diode is electrically coupled to the second input terminal, a positive terminal of the second diode is electrically coupled to the negative terminal of the first diode, and a negative terminal of the second diode is electrically coupled to the output terminal.

15. The liquid crystal display as claimed in claim 14, wherein the charge bump further comprises a second capacitor, the positive terminal of the first diode is grounded via the second capacitor.

16. The liquid crystal display as claimed in claim 15, wherein the charge bump further comprises a third capacitor, the negative terminal of the second diode is grounded via the third capacitor.