APPARATUS AND METHOD OF PAGE PROGRAM OPERATION FOR MEMORY DEVICES WITH MIRROR BACK-UP OF DATA
First Claim
1. An apparatus for controlling a plurality of memory devices interconnected in-series, each of the memory devices having a page buffer and memory cells, the apparatus comprising:
- a data processor configure to execute a page program operation with a mirror back-up of data by;
writing data to the page buffer of a selected memory device of the plurality of memory devices and to the page buffer of another memory device of the plurality of memory devices;
instructing the selected memory device to program the data loaded in its page buffer into its memory cells; and
determining whether the data is not successfully programmed into the memory cells of the selected memory device, recover the data from the page buffer of the another memory device.
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Accused Products
Abstract
An apparatus and method of page program operation is provided. When performing a page program operation with a selected memory device, a memory controller loads the data into the page buffer of one selected memory device and also into the page buffer of another selected memory device in order to store a back-up copy of the data. In the event that the data is not successfully programmed into the memory cells of the one selected memory device, then the memory controller recovers the data from the page buffer of the other memory device. Since a copy of the data is stored in the page buffer of the other memory device, the memory controller does not need to locally store the data in its data storage elements.
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Citations
26 Claims
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1. An apparatus for controlling a plurality of memory devices interconnected in-series, each of the memory devices having a page buffer and memory cells, the apparatus comprising:
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a data processor configure to execute a page program operation with a mirror back-up of data by; writing data to the page buffer of a selected memory device of the plurality of memory devices and to the page buffer of another memory device of the plurality of memory devices; instructing the selected memory device to program the data loaded in its page buffer into its memory cells; and determining whether the data is not successfully programmed into the memory cells of the selected memory device, recover the data from the page buffer of the another memory device. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A system comprising:
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a plurality of memory devices that are interconnected in-series, each memory device having a page buffer and memory cells; and an apparatus for controlling the plurality of memory devices, the apparatus comprising a data processor configured to execute a page program operation with a mirror back-up for data by; writing data to the page buffer of a selected memory device of the plurality of memory devices and to the page buffer of another memory device of the plurality of memory devices; instructing the selected memory device to program the data loaded in its page buffer into its memory cells; and if the data is not successfully programmed into the memory cells of the selected memory device, recover the data from the page buffer of the another memory device. - View Dependent Claims (14, 15, 16)
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17. A method for controlling a plurality of memory devices that are interconnected in-series, each memory device having a page buffer and memory cells, the method comprising:
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transmitting data to the page buffer of a selected memory device of the plurality of memory devices and to the page buffer of another memory device of the plurality of memory devices; instructing the selected memory device to program the data loaded in its page buffer into its memory cells; and if the data is not successfully programmed into the memory cells of the selected memory device, recovering the data from the page buffer of the another memory device. - View Dependent Claims (18, 19)
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20. A memory device for use as one of a set of memory devices connected in-series, the memory device comprising:
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an input connection; an output connection; an identification of a device address of the memory device; and a device controller configured to; receive messages to enter and exit a multi-address detection mode, and enter and exit the multi-address detection mode accordingly; receive a command over the input connection, the command comprising a device address; while not in the multi-address detection mode, process the command only if the device address of the command matches the device address of the device; and while in the multi-address detection mode;
i) process the command if the device address of the command is the same as the device address of the device and ii) process the command if the device address of the command is the same as the device address of at least one other predetermined device. - View Dependent Claims (21, 22, 23, 24, 25)
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26. A method in a memory device forming part of a set of memory devices connected in-series, the method comprising:
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maintaining a device address; receiving messages to enter and exit a multi-address detection mode; receiving a command comprising a device address; while not in the multi-address detection mode, processing the command only if the destination address matches the device address; and while in the multi-address detection mode; processing the command if the device address of the command is the same as the device address of the device; and processing the command if the device address of the command is the same as the device address of at least one other predetermined device.
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Specification