Layout design method, layout design apparatus, and computer product

• US 20080209368A1
• Filed: 12/31/2007
• Published: 08/28/2008
• Est. Priority Date: 02/22/2007
• Status: Abandoned Application

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Yoshikawa, Takahide, Yokomaru, Toshihiko
• Application Number:
  US12/003,774
• Publication Number:
  US 20080209368A1
• Time in Patent Office: Days
• US Class Current: 716/5
• CPC Class Codes: G06F 30/394 Routing G06F30/396 takes precedence

Abstract

An apparatus for designing the layout of a circuit includes an acquiring unit, a determining unit, a specifying unit, an arranging unit, a modifying unit, and a routing unit. Based on net information acquired by the acquiring unit, the determining unit determines a wiring block of signal paths connecting cells connected through adjacent. The arranging unit arranges a wiring area between the cells that extends along user-specified reference points or user-specified reference segments received by the specifying unit. The modifying unit modifies the arranged wiring area and the routing unit routes the signal paths of the wiring block in the modified wiring area.

Claims

1. A computer-readable recording medium storing therein a circuit layout design computer program that causes a computer to execute:

determining a wiring block of a plurality of signal paths that connect a plurality of cells connected through a plurality of adjacent nets, wherein

the determining is based on at least one of a slack value, a signal arrival time, arrangement coordinates of a starting point terminal and an ending point terminal, a name, an angle, and a schematic wiring path included in information concerning the adjacent nets.

2. The computer-readable recording medium according to claim 1, wherein the computer program further causes the computer to execute routing the signal paths of the wiring block.

3. The computer-readable recording medium according to claim 1, wherein the computer program further causes the computer to execute:

receiving specification of a plurality of points or segments between the cells; and

arranging a wiring area that is for the routing of the signal paths of the wiring block, and extends along and from the points or the segments received at the receiving.

4. The computer-readable recording medium according to claim 3, wherein the computer program further causes the computer to execute routing, in the wiring area, the signal paths of the wiring block.

5. The computer-readable recording medium according to claim 3, wherein the computer program further causes the computer to execute modifying the wiring area, based on at least one of a delay, a power consumption, and a degree of routing congestion included in information concerning the wiring area.

6. The computer-readable recording medium according to claim 5, wherein the computer program further causes the computer to execute routing, in the wiring area modified at the modifying, the signal paths of the wiring block.

7. A circuit layout design method comprising:

determining a wiring block of a plurality of signal paths that connect a plurality of cells connected through a plurality of adjacent nets, wherein

the determining is based on at least one of a slack value, a signal arrival time, arrangement coordinates of a starting point terminal and an ending point terminal, a name, an angle, and a schematic wiring path included in information concerning the adjacent nets.

8. The circuit layout design method according to claim 7, wherein the computer program further causes the computer to execute routing the signal paths of the wiring block.

9. The circuit layout design method according to claim 7, wherein the computer program further causes the computer to execute:

receiving specification of a plurality of points or segments between the cells; and

arranging a wiring area that is for routing of the signal paths of the wiring block, and extends along and from the points or the segments received at the receiving.

10. The circuit layout design method according to claim 9, wherein the computer program further causes the computer to execute routing, in the wiring area, the signal paths of the wiring block.

11. The circuit layout design method according to claim 9, wherein the computer program further causes the computer to execute modifying the wiring area, based on at least one of a delay, a power consumption, and a degree of wiring congestion included in information concerning the wiring area.

12. The circuit layout design method according to claim 11, wherein the computer program further causes the computer to execute routing, in the wiring area modified at the modifying, the signal paths of the wiring block.

13. A circuit layout design apparatus comprising:

a determining unit that determines a wiring block of a plurality of signal paths that connect a plurality of cells connected through a plurality of adjacent nets, wherein

the determining unit determines based on at least one of a slack value, a signal arrival time, arrangement coordinates of a starting point terminal and an ending point terminal, a name, an angle, and a schematic wiring path included in information concerning the adjacent nets.

14. The circuit layout design apparatus according to claim 13, further comprising a routing unit that routes the signal paths of the wiring block.

15. The circuit layout design apparatus according to claim 13, further comprising:

a specification unit that receives specification of a plurality of points or segments between the cells; and

an arranging unit that arranges a wiring area that is for routing of the signal paths of the wiring block, and extends along and from the points or the segments received at the receiving.

16. The circuit layout design apparatus according to claim 15, further comprising a routing unit that routes, in the wiring area, the signal paths of the wiring block.

17. The circuit layout design apparatus according to claim 15, further comprising a modifying unit that modifies the wiring area, based on at least one of a delay, a power consumption, and a degree of wiring congestion included in information concerning the wiring area.

18. The circuit layout design apparatus according to claim 17, further comprising a routing unit that routes, in the wiring area modified at the modifying, the signal paths of the wiring block.