SEMICONDUCTOR DEVICE

• US 20080210938A1
• Filed: 12/20/2007
• Published: 09/04/2008
• Est. Priority Date: 12/22/2006
• Status: Active Grant

• Current Assignee: Nissan Motor Co., Ltd.
• Original Assignee: Nissan Motor Co., Ltd.
• Inventors: Tanaka, Hideaki, Hoshi, Masakatsu, Hayashi, Tetsuya, Yamagami, Shigeharu
• Granted Patent: US 7,910,923 B2
• Time in Patent Office: Days
• US Class Current: 257/51
• CPC Class Codes: H01L 21/32139 using masks
• CPC Class Codes: H01L 27/0605 integrated circuits made of compound material, e.g. AIIIBV
• CPC Class Codes: H01L 27/088 the components being field-effect transistors with insulated gate
• CPC Class Codes: H01L 29/0619 with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
• CPC Class Codes: H01L 29/0623 Buried supplementary region, e.g. buried guard ring multi-RESURF H01L29/0634
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/267 in different semiconductor regions , e.g. heterojunctions H01L29/263 takes precedence
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/66068 the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
• CPC Class Codes: H01L 29/7828 without inversion channel, e.g. vertical ACCUFETs, normally-on vertical MISFETs

Abstract

A semiconductor device with superior long-term reliability is disclosed that alleviates current concentration into a switch structure arranged at an outermost portion. The semiconductor device comprises hetero semiconductor regions formed of polycrystalline silicon having a band gap width different from that of a drift region and hetero-adjoined with the drift region, a gate insulation film, a gate electrode adjoined to the gate insulation film, a source electrode connected to a source contact portion of the hetero semiconductor regions and an outermost switch structure and a repeating portion switch structure with a drain electrode connected to a substrate region. In a conduction state, the outermost switch structure comprises a mechanism in which the current flowing at the outermost switch structure becomes smaller than the current flowing at the repeating portion switch structure.

Claims

1. A semiconductor device, comprising:

a plurality of switch elements integrated on one semiconductor chip, each switch element including;

a semiconductor substrate formed from a first semiconductor material;

a hetero semiconductor region formed from a second semiconductor material having a band gap width different from that of the first semiconductor material, the hetero semiconductor region being hetero-adjoined with the semiconductor substrate;

a gate insulation film adjoined to a heterojunction of the semiconductor substrate and the hetero semiconductor region;

a gate electrode adjoined to the gate insulation film;

a source electrode connected to a source contact portion of the hetero semiconductor region; and

a drain electrode connected to the semiconductor substrate;

wherein the plurality of switch elements comprises a first switch element arranged at an outermost portion of the semiconductor chip and a second switch element arranged at an inner portion of the semiconductor chip; and

wherein the first switch element comprises a mechanism in which current flowing at the first switch element becomes smaller than current flowing at the second switch element when the switch elements are conducting the current.

2. The semiconductor device according to claim 1 wherein the mechanism comprises:

a first hetero barrier height of a heterojunction of the first switch element higher than a second hetero barrier height of a heterojunction of the second switch element.

3. The semiconductor device according to claim 2 wherein a conductive type of the heterojunction of the first switch element differs from a conductive type of the semiconductor substrate.

4. The semiconductor device according to claim 1 wherein the mechanism includes the first switch element having a resistance from a heterojunction driving end of the first switch element to a source contact portion of the first switch element greater than a resistance from a source contact portion of the second switch element to a heterojunction driving end of the second switch element;

and wherein each heterojunction driving end is a portion of a respective heterojunction adjoined to a respective gate insulation film.

5. The semiconductor device according to claim 4 wherein an impurity concentration of a hetero semiconductor region of the first switch element is less than an impurity concentration of a hetero semiconductor region of the second switch element.

6. The semiconductor device according to claim 1 wherein the first switch element further comprises an outermost electric field alleviating region adjoined to a heterojunction driving end of the first switch element and not adjoined to a heterojunction driving end of the second switch element;

and wherein each heterojunction driving end is a portion of a respective heterojunction adjoined to a respective gate insulation film.

7. The semiconductor device according to claim 6 wherein the mechanism includes a gate electric field strength of the heterojunction driving end of the first switch element less than a gate electric field strength of the heterojunction driving end of the second switch element.

8. The semiconductor device according to claim 6 wherein the mechanism includes a drain electric field strength of the heterojunction driving end of the first switch element less than a drain electric field strength of the heterojunction driving end of the second switch element.

9. The semiconductor device according to claim 1 wherein an inclined angle of a heterojunction driving end of the first switch element is greater than an inclined angle of a heterojunction driving end of the second switch element;

and wherein each heterojunction driving end is a portion of a respective heterojunction adjoined to a respective gate insulation film.

10. The semiconductor device according to claim 9 wherein the mechanism includes a drain electric field strength of the heterojunction driving end of the first switch element less than a drain electric field strength of the heterojunction driving end of the second switch element.

11. The semiconductor device according to claim 9 wherein a hetero barrier height of a heterojunction of the first switch element is greater than a hetero barrier height of a heterojunction of the second switch element.

12. The semiconductor device according to claim 11 wherein a conductive type of the heterojunction of the first switch element differs from a conductive type of the semiconductor substrate.

13. The semiconductor device according to claim 9 wherein the mechanism includes a resistance from the heterojunction driving end of the first switch element to the source contact portion of the first switch element greater than a resistance from the heterojunction driving end of the second switch element to the source contact portion of the second switch element.

14. The semiconductor device according to claim 13 wherein an impurity concentration of a hetero semiconductor region of the first switch element is less than an impurity concentration of a hetero semiconductor region of the second switch element.

15. The semiconductor device according to claim 9, further comprising:

an outermost electric field alleviating region adjoined to the heterojunction driving end of the first switch element and not adjoined to the heterojunction driving end of the second switch element.

16. The semiconductor device according to claim 15 wherein the mechanism includes a gate electric field strength of the heterojunction driving end of the first switch element less than a gate electric field strength of the heterojunction driving end of the second switch element.

17. The semiconductor device according to claim 15 wherein the mechanism includes a drain electric field strength of the heterojunction driving end of the first switch element less than a drain electric field strength of the heterojunction driving end of the second switch element.

18. The semiconductor device according to claim 1 wherein the first semiconductor material is formed from at least one of silicon carbide, diamond and gallium nitride.

19. The semiconductor device according to claim 1 wherein the second semiconductor material is formed from at least one of a single crystal silicon, a polycrystalline silicon and an amorphous silicon.